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參數(shù)資料
| 型號： | MAX1048BETX+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 29/39頁 |
| 文件大小： | 0K |
| 描述： | IC ADC/DAC 10BIT 36-TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 10 b |
| 采樣率（每秒）： | 225k |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 36-TQFN 裸露焊盤（6x6） |
| 包裝： | 帶卷 (TR) |
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MAX1040/MAX1042/MAX1046/MAX1048
10-Bit, Multichannel ADCs/DACs with FIFO,
Temperature Sensing, and GPIO Ports
______________________________________________________________________________________
35
GPIO INPUT/OUTPUT
CS
tGSU
tGOD
Figure 13. GPIO Timing
LDAC
tLDACPWL
tS
OUT_
±1 LSB
Figure 14.
LDAC Functionality
LDAC Functionality
Drive
LDAC low to transfer the content of the input reg-
isters to the DAC registers. Drive
LDAC permanently
low to make the DAC register transparent. The DAC
output typically settles from zero to full scale within ±1
LSB after 2s. See Figure 14.
Layout, Grounding, and Bypassing
For best performance, use PC boards. Ensure that digi-
tal and analog signal lines are separated from each
other. Do not run analog and digital signals parallel to
one another (especially clock signals) or do not run dig-
ital lines underneath the MAX1040/MAX1042/
MAX1046/MAX1048 package. High-frequency noise in
the AVDD power supply may affect performance.
Bypass the AVDD supply with a 0.1F capacitor to
AGND, close to the AVDD pin. Bypass the DVDD supply
with a 0.1F capacitor to DGND, close to the DVDD pin.
Minimize capacitor lead lengths for best supply-noise
rejection. If the power supply is very noisy, connect a
10Ω resistor in series with the supply to improve power-
supply filtering.
The MAX1040/MAX1042/MAX1046/MAX1048 thin QFN
packages contain an exposed pad on the underside of
the device. Connect this exposed pad to AGND. Refer to
the MAX1258EVKIT for an example of proper layout.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nullified. INL for
the MAX1040/MAX1042/MAX1046/MAX1048 is mea-
sured using the end-point method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A
DNL error specification of less than 1 LSB guarantees
no missing codes and a monotonic transfer function.
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