
Operating Modes and On-Chip Memory
M68HC11E Family Data Sheet, Rev. 5.1
36
Freescale Semiconductor
$1019
Timer Output Compare 2 Register
Low (TOC2L)
See page 134.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$101A
Timer Output Compare 3 Register
High (TOC3H)
See page 135.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$101B
Timer Output Compare 3 Register
Low (TOC3L)
See page 135.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$101C
Timer Output Compare 4 Register
High (TOC4H)
See page 135.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$101D
Timer Output Compare 4 Register
Low (TOC4L)
See page 135.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$101E
Timer Input Capture 4/Output
Compare 5 Register High
(TI4/O5)
See page 133.
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
$101F
Timer Input Capture 4/Output
Compare 5 Register Low
(TI4/O5)
See page 133.
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
$1020
Timer Control Register 1
(TCTL1)
See page 137.
Read:
OM2
OL2
OM3
OL3
OM4
OL4
OM5
OL5
Write:
Reset:
0
0
0
0
0
0
0
0
$1021
Timer Control Register 2
(TCTL2)
See page 131.
Read:
EDG4B
EDG4A
EDG1B
EDG1A
EDG2B
EDG2A
EDG3B
EDG3A
Write:
Reset:
0
0
0
0
0
0
0
0
$1022
Timer Interrupt Mask 1 Register
(TMSK1)
See page 138.
Read:
OC1I
OC2I
OC3I
OC4I
I4/O5I
IC1I
IC2I
IC3I
Write:
Reset:
0
0
0
0
0
0
0
0
$1023
Timer Interrupt Flag 1
(TFLG1)
See page 138.
Read:
OC1F
OC2F
OC3F
OC4F
I4/O5F
IC1F
IC2F
IC3F
Write:
Reset:
0
0
0
0
0
0
0
0
$1024
Timer Interrupt Mask 2 Register
(TMSK2)
See page 139.
Read:
TOI
RTII
PAOVI
PAII
PR1
PR0
Write:
Reset:
0
0
0
0
0
0
0
0
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented
R
= Reserved
U = Unaffected
I = Indeterminate after reset
Figure 2-7. Register and Control Bit Assignments (Sheet 3 of 6)