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參數(shù)資料
| 型號： | M68AR256ML70ZB1F |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | SRAM |
| 英文描述： | 256K X 16 STANDARD SRAM, 70 ns, PBGA48 |
| 封裝： | 6 X 7 MM, 0.75 MM PITCH, LEAD FREE, TFBGA-48 |
| 文件頁數(shù)： | 16/21頁 |
| 文件大?。?/td> | 414K |
| 代理商： | M68AR256ML70ZB1F |
Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
M68AR256M
4/21
SUMMARY DESCRIPTION
The M68AR256M is a 4 Mbit (4,194,304 bit)
CMOS SRAM, organized as 262,144 words by 16
bits.
The device features fully static operation requiring
no external clocks or timing strobes, with equal ad-
dress access and cycle times. It operates from a
single 1.8V (±150mV) supply voltage.
The M68AR256M has an automatic power-down
feature, reducing the power consumption by over
99%.
The M68AR256M is available in TFBGA48 (0.75
mm pitch) package. In addition to the standard ver-
sion, the TFBGA48 package is also available in
Lead-free version, in compliance with the ST ECO-
PACK 7191395 Specification and the RoHS (Re-
striction of Hazardous Substances) directive.
Figure 2. Logic Diagram
Table 1. Signal Names
AI04890C
18
A0-A17
W
DQ0-DQ15
VCC
M68AR256M
G
16
E
UB
LB
VSS
A0-A17
Address Inputs
DQ0-DQ15
Data Input/Output
E
Chip Enable
G
Output Enable
W
Write Enable
UB
Upper Byte Enable Input
LB
Lower Byte Enable Input
VCC
Supply Voltage
VSS
Ground
NC
Not Connected Internally
DU
Don’t Use as Internally Connected
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| M68AR256ML70ZB1T | 制造商:STMicroelectronics 功能描述: |
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