參數(shù)資料
型號: M5M44405CJ-7S
廠商: Mitsubishi Electric Corporation
英文描述: EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
中文描述: 江戶(超頁模式)4194304位(1048576 - Word的4位)動態(tài)隨機存儲器
文件頁數(shù): 1/27頁
文件大小: 244K
代理商: M5M44405CJ-7S
EDEDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
MIMITSUBISHI LSIs
M5M44405CJ,TP-5,-5S:Under development
DESCRIPTION
This is a family of 1048576-word by 4-bit dynamic RAMs, fabricated
with the high performance CMOS process,and is ideal for large-
capacity memory systems where high speed, low power dissipation,
and low costs are essential.
The use of quadruple-layer polysilicon process combined with
silicide technology and a single-transistor dynamic storage stacked
capacitor cell provide high circuit density at reduced costs.
Multiplexed address inputs permit both a reduction in pins and an
increase in system densities.
Self or extended refresh current is low enough for battery back-up
application.
APPLICATION
Main memory unit for computers, Microcomputer memory, Refresh
memory for CRT, Frame Buffer memory for CRT
1
M5M44405CJ,TP-5,-6,-7,-5S,-6S,-7S
Standard 26 pin SOJ, 26 pin TSOP(II)
Single 5V±10%supply
Low stand-by power dissipation
CMOS lnput level 5.5mW (Max) *
CMOS lnput level 550μW (Max)
Low operating power dissipation
M5M44405Cxx-5,-5S 687.5mW (Max)
M5M44405Cxx-6,-6S 550.0mW (Max)
M5M44405Cxx-7,-7S 467.5mW (Max)
Self refresh capabiility *
Self refresh current 120μA(max)
Extended refresh capability *
Extended refresh current 120μA(max)
Hyper-page mode (1024-bit random access), Read-modify- write,
RAS-only refresh CAS before RAS refresh, Hidden refresh, CBR
self refresh(-5S,-6S,-7S) capabilities
Early-write mode and OE and W to control output buffer impedance
All inputs, output TTL compatible and low capacitance
1024 refresh cycles every 16.4ms (A
0
~A
9
)
1024refresh cycle every 128ms (A
0
~A
9
) *
4-bit parallel test mode capability
*
: Applicable to self refresh version (M5M44405CJ,TP-5S,-6S,-7S
: option) only
FEATURES
XX=J,TP
M5M44405CXX-7,-7S
M5M44405CXX-6,-6S
60
70
15
20
30
35
110
130
400
350
15
20
M5M44405CXX-5,-5S
50
13
25
90
500
13
CAS
access
time
(max.ns)
OE
access
time
(max.ns)
Type name
RAS
access
time
(max.ns)
(max.ns)
Address
access
time
(min.ns)
Cycle
time
Power
dissipa-
tion
(typ.mW)
PIN DESCRIPTION
A
0
~A
9
DQ
1
~DQ
4
RAS
CAS
W
OE
Vcc
Vss
Pin name
Function
Address Inputs
Data Inputs / Outputs
Row Address Strobe Input
Column Address Strobe Input
Write Control Input
Output Enable Input
Power Supply (+5V)
Ground (0V)
PIN CONFIGURATION (TOP VIEW)
Outline 26P0J (300mil SOJ)
1
9
2
3
4
5
11
10
12
13
26
25
24
23
22
16
18
17
15
14
DQ
1
DQ
2
A
0
A
1
A
2
A
3
V
CC
V
SS
DQ
4
DQ
3
CAS
OE
A
9
A
8
A
7
A
6
A
5
A
4
W
RAS
Outline 26P3Z-E (300mil TSOP)
1
9
2
3
4
5
11
10
12
13
26
25
24
23
22
16
18
17
15
14
DQ
1
DQ
2
A
0
A
1
A
2
A
3
V
CC
V
SS
DQ
4
DQ
3
CAS
OE
A
9
A
8
A
7
A
6
A
5
A
4
W
RAS
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M5M44405CTP-5S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
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M5M44405CTP-6S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
M5M44405CTP-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM