參數(shù)資料
型號： M5M44405CJ-7
廠商： Mitsubishi Electric Corporation
英文描述： EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
中文描述： 江戶（超頁模式）4194304位（1048576 - Word的4位）動態(tài)隨機(jī)存儲器
文件頁數(shù)： 5/27頁
文件大?。?/td> 244K
代理商： M5M44405CJ-7
EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
M5M44405CJ,TP-5,-6,-7,-5S,-6S,-7S
MITSUBISHI LSIs
M5M44405CJ,TP-5,-5S:Under development
TIMING REQUIREMENTS (For Read, Write, Read-Modify-Write, Refresh, and Hyper-Page Mode Cycles)
(Ta=0~70C, V
CC
= 5V±10%, V
SS
=0V, unless otherwise noted, see notes 14,15)
M5M44405C-5,-5S M5M44405C-6,-6S M5M44405C-7,-7S
Min
Max
Min
16.4
128
Parameter
Symbol
Limits
Unit
Max
16.4
128
Min
Max
16.4
128
t
REF
t
REF
t
RP
t
RCD
t
CRP
t
RPC
t
CPN
t
RAD
ASR
t
ASC
t
RAH
t
CAH
t
DZC
t
DZO
t
RDD
t
CDD
t
ODD
t
T
Note 14 : The timing requirements are assumed
t
T
=2ns.
Note
15 : V
IH(min)
and V
IL(max)
are reference levels for measuring timing of input signals.
Note
16 :
t
RCD(max)
is specified as a reference point only. If
t
RCD
is less than
t
RCD(max),
access time is
t
RAC
.
If
t
RCD
is greater than
t
RCD(max)
,
access
time is
controlled exclusively by
t
CAC
or
t
AA
.
Note
17 :
t
RAD(max)
is specified as a reference point only. If
t
RAD
≥
t
RAD(max)
and
t
ASC
≤
t
ASC(max)
,
access time is controlled exclusively by
t
AA
.
Note
18 :
t
ASC(max)
is specified as a reference point only. If
t
RCD
≥
t
RCD(max)
and
t
ASC
≥
t
ASC(max)
,
access time is controlled exclusively by
t
CAC
.
Note
19 :
Either
t
DZC
or
t
DZO
must be satisfied.
Note
20 : Either
t
RDD
or
t
CDD
or
t
ODD
must be satisfied.
Note
21 :
t
T
is measured between V
IH(min)
and V
IL(max)
.
Refresh cycle time
Refresh cycle time *
RAS high pulse width
Delay time, RAS low to CAS low
Delay time, CAS high to RAS low
Delay time, RAS high to CAS low
CAS high pulse width
Column address delay time from RAS low
Row address setup time before RAS low
Column address setup time before CAS low
Row address hold time after RAS low
Column address hold time after CAS low
Delay time, data to CAS low
Delay time, data to OE low
Delay time, RAS high to data
(Note 21)
(Note 16)
(Note 17)
(Note 18)
45
30
0
40
20
13
50
5
10
15
10
10
0
0
1
37
25
0
30
18
5
10
50
8
13
8
8
0
0
1
Transition time
(Note 19)
(Note 19)
(Note 20)
(Note 20)
(Note 20)
Delay time, CAS high to data
Delay time, OE high to data
0
0
0
0
15
13
15
13
15
13
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
50
35
0
50
20
13
50
5
13
15
10
10
0
0
1
0
0
20
20
20
Read and Refresh Cycles
t
RC
t
RAS
t
CAS
t
CSH
t
RSH
t
RCS
t
RCH
t
RRH
t
RAL
t
CAL
t
ORH
t
OCH
Note 22 : Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
M5M44405C-5,-5S M5M44405C-6,-6S M5M44405C-7,-7S
Min
Max
Min
90
50
8
40
13
0
Parameter
Symbol
Limits
Unit
Max
Min
130
70
13
55
20
Max
Read cycle time
RAS low pulse width
CAS low pulse width
CAS hold time after RAS low
RAS hold time after CAS low
Read Setup time before CAS low
Read hold time after CAS high
Read hold time after RAS high
Column address to RAS hold time
Column address to CAS hold time
(Note 22)
(Note 22)
RAS hold time after OE low
CAS hold time after OE low
0
0
0
10000
10000
10000
10000
25
13
13
13
0
0
110
60
10
48
15
30
18
15
15
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10000
10000
0
0
0
35
23
20
20
5
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M5M44405CJ-7S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
M5M44405CTP-5 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
M5M44405CTP-5S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
M5M44405CTP-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
M5M44405CTP-6S 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:EDO ( HYPER PAGE MODE ) 4194304-BIT ( 1048576-WORD BY 4-BIT ) DYNAMIC RAM
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