- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄180224 > M5LV-512/160-12YI (LATTICE SEMICONDUCTOR CORP) Fifth Generation MACH Architecture PDF資料下載
參數(shù)資料
| 型號： | M5LV-512/160-12YI |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | PLD |
| 英文描述： | Fifth Generation MACH Architecture |
| 中文描述： | EE PLD, 12 ns, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 34/42頁 |
| 文件大小： | 938K |
| 代理商： | M5LV-512/160-12YI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當(dāng)前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
4MACH 5 Family
allow for mixed-voltage design, and both the 3.3-V and the 5-V device versions are in-system
programmable through an IEEE 1149.1 Test Access Port (TAP) interface.
FUNCTIONAL DESCRIPTION
The MACH 5 architecture consists of PAL blocks connected by two levels of interconnect. The block
interconnect provides routing among 4 PAL blocks. This grouping of PAL blocks joined by the
block interconnect is called a segment. The second level of interconnect, the segment
interconnect, ties all of the segments together. The only logic difference between any two MACH
5 devices is the number of segments. Therefore, once a designer is familiar with one device,
consistent performance can be expected across the entire family. All devices have four clock pins
available which can also be used as logic inputs.
The MACH 5 PAL blocks consist of the elements listed below (Figure 2). While each PAL block
resembles an independent PAL device, it has superior control and logic generation capabilities.
◆
I/O cells
◆
Product-term array and Logic Allocator
◆
Macrocells
◆
Register control generator
◆
Output enable generator
I/O Cells
The I/Os associated with each PAL block have a path directly back to that PAL block called
local
feedback. If the I/O is used in another PAL block, the interconnect feeder assigns a block interconnect
line to that signal. The interconnect feeder acts as an input switch matrix. The block and segment
interconnects provide connections between any two signals in a device. The
block feeder assigns
block interconnect lines and local feedback lines to the PAL block inputs.
Block
Interconnect
4
CLK
Block:
16 MCs
Segment:
4 Blocks
Segment Interconnect
20446G-001
Figure 1. MACH 5 Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M50-2020005 | INTERCONNECTION DEVICE |
| M50-3002145 | 42 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
| M50-3002245 | 44 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
| M50-3002345 | 46 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
| M50-3002445 | 48 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M | 功能描述:XLR 連接器 5P ADAPT RECEPTACLE RoHS:否 制造商:Neutrik 標(biāo)準(zhǔn):Standard XLR 產(chǎn)品類型:Connectors 型式:Female 位置/觸點(diǎn)數(shù)量:3 端接類型:Solder 安裝風(fēng)格:Cable 方向:Vertical |
| M-5M | 制造商:SMC 功能描述:Fitting manifold 9 port Rc1/8 to M5 |
| M5M1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEDIUM CURRENT SILICON RECTIFIERS |
| M5M27C102J15 | 制造商:MITSUBISHI 功能描述:* |
| M5M27C102JK-15 | 制造商:Mitsubishi Electric 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。