參數(shù)資料
型號: M58LT128GST
廠商: 意法半導體
英文描述: 128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories
中文描述: 128Mbit(8兆x16插槽,多銀行,多層次,多突發(fā))1.8V電源安全閃存
文件頁數(shù): 58/98頁
文件大?。?/td> 693K
代理商: M58LT128GST
11 DC and AC parameters
M58LT128GST, M58LT128GSB
58/98
Figure 12. Single Synchronous Read AC Waveforms
AI08312
E
G
A0-A22
L
WAIT
(1,2)
K
(2)
VALID ADDRESS
tGLQV
tAVKH
tLLKH
tELKH
Hi-Z
tELQX
tKHQV
Note 1. The WAIT signal is configured to be active during wait state. WAIT signal is active Low.
2. Address latched and data output on the rising clock edge. Either the rising or the falling edge of the clock signal, K, can
be configured as the active edge. Here, the active edge is the rising one.
tGLQX
tKHTV
DQ0-DQ15
VALID
Hi-Z
tELQV
tGLTV
tGHTZ
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