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參數(shù)資料
| 型號(hào)： | M58LT128GST1ZA5 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories |
| 中文描述： | 128Mbit（8兆x16插槽，多銀行，多層次，多突發(fā)）1.8V電源安全閃存 |
| 文件頁(yè)數(shù)： | 62/98頁(yè) |
| 文件大小： | 693K |
| 代理商： | M58LT128GST1ZA5 |
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11 DC and AC parameters
M58LT128GST, M58LT128GSB
62/98
Table 24.
Write AC Characteristics, Write Enable Controlled
Symbol
Alt
Parameter
(1)
1.
Sampled only, not 100% tested.
M58LT128GST,
M58LT128GSB
Unit
110
W
t
AVAV
t
WC
Address Valid to Next Address Valid
Min
110
ns
t
AVLH
Address Valid to Latch Enable High
Min
11
ns
t
AVWH(2)
2.
These timings are meaningful only if Latch Enable, L, is always kept Low, V
IL
.
t
has the values shown when reading in the targeted bank. System designers should take this into account and may
insert a software No-Op instruction to delay the first read in the same bank after issuing a command. If it is a Read Array
operation in a different bank t
WHEL
is 0ns.
Address Valid to Write Enable High
Min
50
ns
t
DVWH
t
DS
Data Valid to Write Enable High
Min
50
ns
t
ELLH
Chip Enable Low to Latch Enable High
Min
11
ns
t
ELWL
t
CS
Chip Enable Low to Write Enable Low
Min
0
ns
t
ELQV
Chip Enable Low to Output Valid
Min
110
ns
t
ELKV
Chip Enable Low to Clock Valid
Min
9
ns
t
GHWL
Output Enable High to Write Enable Low
Min
17
ns
t
LHAX
Latch Enable High to Address Transition
Min
9
ns
t
LLLH
Latch Enable Pulse Width
Min
11
ns
t
WHAV(2)
Write Enable High to Address Valid
Min
0
ns
t
WHAX(2)
Write Enable High to Address Transition
Min
0
ns
t
WHDX
t
DH
Write Enable High to Input Transition
Min
0
ns
t
WHEH
t
CH
Write Enable High to Chip Enable High
Min
0
ns
t
WHEL(3)
3.
Write Enable High to Chip Enable Low
Min
25
ns
t
WHLL
Write Enable High to Latch Enable Low
Min
0
ns
t
WHWL
t
WPH
Write Enable High to Write Enable Low
Min
25
ns
t
WLWH
t
WP
Write Enable Low to Write Enable High
Min
50
ns
P
t
QVVPL
Output (Status Register) Valid to V
PP
Low
Min
0
ns
t
VPHWH
t
VPS
V
PP
High to Write Enable High
Min
200
ns
t
WHVPL
Write Enable High to V
PP
Low
Min
200
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M58LT128GSB | 128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories |
| M58LT128GSB1ZA5 | 128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories |
| M58LT128GS | 128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories |
| M58LT128GST1ZA5E | 128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories |
| M58LT128GST1ZA5F | 128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M58LT128GST1ZA5E | 制造商:STMicroelectronics 功能描述: |
| M58LT128GST1ZA5F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128Mbit (8Mb x16, Multiple Bank, Multi-Level, Burst) 1.8V Supply Secure Flash Memories |
| M58LT128HSB | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:128 Mbit (8 Mb 】16, multiple bank, multilevel interface, burst) 1.8 V supply, secure Flash memories |
| M58LT128HSB8ZA6 | 制造商:Micron Technology Inc 功能描述:NOR Flash Parallel/Serial 1.8V 128Mbit 8M x 16bit 85ns 64-Pin TBGA Tray 制造商:Micron Technology Inc 功能描述:STD FLASH - Trays |
| M58LT128HSB8ZA6E | 功能描述:IC FLASH 128MBIT 85NS 64TBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:32K (4K x 8) 速度:100kHz，400kHz 接口:I²C，2 線串口 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:帶卷 (TR) 其它名稱:CAV24C32WE-GT3OSTR |
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