參數(shù)資料
型號: M48T12-70PC1
廠商: 意法半導體
英文描述: 16 Kbit 2Kb x8 TIMEKEEPER[ SRAM
中文描述: 16千位2KB的x8計時器[靜態(tài)存儲器
文件頁數(shù): 8/15頁
文件大?。?/td> 94K
代理商: M48T12-70PC1
Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
0 to 70
°C
TSTG
Storage Temperature (VCC Off, Oscillator Off)
–40 to 85
°C
TSLD
(2)
Lead Solder Temperature for 10 seconds
260
°C
VIO
Input or Output Voltages
–0.3 to 7
V
VCC
Supply Voltage
–0.3 to 7
V
IO
Output Current
20
mA
PD
Power Dissipation
1
W
Notes: 1. Stresses greater than those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may
affect reliability.
2. Soldering temperature not to exceed 260
°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).
CAUTION: Negative undershoots below –0.3 volts are not allowed on any pin while in the Battery Back-up mode.
Table 2. Absolute Maximum Ratings (1)
Mode
VCC
E
G
W
DQ0-DQ7
Power
Deselect
4.75V to 5.5V
or
4.5V to 5.5V
VIH
X
High Z
Standby
Write
VIL
XVIL
DIN
Active
Read
VIL
VIH
DOUT
Active
Read
VIL
VIH
High Z
Active
Deselect
VSO to VPFD (min)
X
High Z
CMOS Standby
Deselect
≤ VSO
X
High Z
Battery Back-up Mode
Notes:X = VIH or VIL;VSO = Battery Back-up Switchover Voltage.
Table 3. Operating Modes
A1
A0
DQ0
A7
A4
A3
A2
A6
A5
A10
A8
A9
DQ7
W
G
E
DQ5
DQ1
DQ2
DQ3
VSS
DQ4
DQ6
VCC
AI01028
M48T02
M48T12
8
1
2
3
4
5
6
7
9
10
11
12
16
15
24
23
22
21
20
19
18
17
14
13
Figure 2. DIP Pin Connections
The M48T02/12 button cell has sufficient capacity
and storagelife to maintain data and clockfunction-
ality for an accumulated time period of at least 10
years in the absence of power over the operating
temperature range.
The M48T02/12 is a non-volatile pin and function
equivalent to any JEDEC standard 2Kb x8 SRAM.
It also easily fits into many ROM, EPROM, and
EEPROM sockets, providing the non-volatility of
PROMs without any requirement for special write
timing or limitations on the number of writes that
can be performed.
As Figure 3 shows, the staticmemory array and the
quartz controlled clock oscillator of the M48T02/12
are integrated on one silicon chip. The two circuits
are interconnected at the upper eight memory lo-
cations to provide user accessible BYTEWIDE
clock information in the bytes with addresses7F8h-
7FFh. The clock locations contain the year, month,
date, day, hour, minute, and secondin 24 hour BCD
format. Corrections for 28, 29 (leap year), 30, and
31 day months are made automatically.
DESCRIPTION (cont’d)
2/15
M48T02, M48T12
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