![](http://datasheet.mmic.net.cn/90000/M44C090-XXX-FL16_datasheet_2360652/M44C090-XXX-FL16_49.png)
49
Atmel ATmega16/32/64/M1/C1 [DATASHEET]
7647K–AVR–12/13
When the BOOTRST fuse is unprogrammed, the Boot section size set to 2K bytes and the IVSEL bit in the MCUCR register is
set before any interrupts are enabled, the most typical and general program setup for the reset and interrupt vector addresses in
ATmega16/32/64/M1/C1 is:
Address
Labels Code
Comments
0x000
RESET: ldi
r16,high(RAMEND)
; Main program start
0x001
out
SPH,r16
; Set Stack Pointer to top of RAM
0x002
ldi
r16,low(RAMEND)
0x003
out
SPL,r16
0x004
sei
; Enable interrupts
0x005
<instr>
xxx
;
.org 0xC02
0xC02
jmp
ANA_COMP_0
; analog comparator 0 Handler
0xC04
jmp
ANA_COMP_1
; analog comparator 1 Handler
...
;
0xC3C
jmp
SPM_RDY
; Store Program Memory Ready Handler
When the BOOTRST fuse is programmed and the boot section size set to 2Kbytes, the most typical and general program setup
for the reset and interrupt vector addresses in ATmega16/32/64/M1/C1 is:
Address
Labels Code
Comments
.org 0x002
0x002
jmp
ANA_COMP_0
; analog comparator 0 Handler
0x004
jmp
ANA_COMP_1
; analog comparator 1 Handler
...
;
0x03C
jmp
SPM_RDY
; Store Program Memory Ready Handler
;
.org 0xC00
0xC00
RESET: ldi
r16,high(RAMEND)
; Main program start
0xC01
out
SPH,r16
; Set Stack Pointer to top of RAM
0xC02
ldi
r16,low(RAMEND)
0xC03
out
SPL,r16
0xC04
sei
; Enable interrupts
0xC05
<instr>
xxx
When the BOOTRST fuse is programmed, the boot section size set to 2Kbytes and the IVSEL bit in the MCUCR register is set
before any interrupts are enabled, the most typical and general program setup for the reset and interrupt vector addresses in
ATmega16/32/64/M1/C116/32 is:
Address
Labels Code
Comments
;
.org 0xC00
0xC00
jmp
RESET
; Reset handler
0xC02
jmp
ANA_COMP_0
; analog comparator 0 Handler
0xC04
jmp
ANA_COMP_1
; analog comparator 1 Handler
...
;
0xC3C
jmp
SPM_RDY
; Store Program Memory Ready Handler
;
0xC3E
RESET: ldi
r16,high(RAMEND)
; Main program start
0xC3F
out
SPH,r16
; Set Stack Pointer to top of RAM
0xC40
ldi
r16,low(RAMEND)
0xC41
out
SPL,r16
0xC42
sei
; Enable interrupts
0xC43
<instr>
xxx