參數(shù)資料
型號: M41T93ZQA6F
廠商: STMICROELECTRONICS
元件分類: 時鐘/數(shù)據(jù)恢復及定時提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PQCC16
封裝: 4 X 4 MM, ROHS COMPLIANT, QFN-16
文件頁數(shù): 28/49頁
文件大?。?/td> 719K
代理商: M41T93ZQA6F
Clock operation
M41T93
Doc ID 12615 Rev 5
3.15
Initial power-on defaults
Upon initial application of power to the device, the register bits will initially power-on in the
state indicated in Table 13 and Table 14.
Table 13.
Initial power-on default values (part 1)
Table 14.
Initial power-up default values (part 2)
3.16
OTP bit operation (SOX18 package only)
When the OTP (one time programmable) bit is set to a '1,' the value in the internal OTP
registers will be transferred to the analog calibration register (12h) and are “read only.” The
OTP value is programmed by the manufacturer, and will contain the calibration value
necessary to achieve ±5 ppm at room temperature after two SMT reflows. This clock
accuracy can be guaranteed to drift no more than ±3 ppm the first year, and ±1 ppm for
each following year due to crystal aging.
If the OTP bit is set to '0,' the analog calibration register will become a WRITE/READ
register and function like standard SRAM memory cells, allowing the user to implement any
desired value of analog calibration.
When the user sets the OTP bit, they need to wait for approximately 8 ms before the analog
registers transfer the value from the OTP to the analog registers due to the OTP read
operation.
Condition(1)
1.
All other control bits power-up in an undetermined state
ST
CB1 CB0 OUT FT
DCS
ACS
Digital
calib.
Analog
calib.
OFIE Watchdog(2)
2.
BMB0-BMB4, RB0, RB1
A1IE
SQWE ABE
Initial
power-up
00
0
1
0
1
0
Subsequent
power-up(3)(4)
3.
With battery backup
4.
UC = Unchanged
UC
0
UC
0
UC
Condition(1)
1.
All other control bits power-up in an undetermined state
RPT11-15
HT
OF
TE
TI/TP
TIE
TD1
TD0 RS0 RS1-3 OTP RPT21-25
AL2E
Initial
power-up
01
1
0
1
0
Subsequent
power-up (2)(3)
2.
With battery backup
3.
UC = Unchanged
UC
1
UC
0
UC
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