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參數(shù)資料
| 型號： | M39208-15WNB1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | PROM |
| 英文描述： | 256K X 8 FLASH 2.7V PROM, 150 ns, PDSO32 |
| 封裝： | 8 X 14 MM, PLASTIC, TSOP-32 |
| 文件頁數(shù)： | 12/30頁 |
| 文件大?。?/td> | 218K |
| 代理商： | M39208-15WNB1 |
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Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
–40 to 85
°C
TBIAS
Temperature Under Bias
–50 to 125
°C
TSTG
Storage Temperature
–65 to 150
°C
VIO
(2)
Input or Output Voltages
–0.6 to 5
V
VCC
Supply Voltage
–0.6 to 5
V
VA9, VG, VEF
(2)
A9, G, EF Voltage
–0.6 to 13.5
V
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other
relevant quality documents.
2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns.
Table 2. Absolute Maximum Ratings (1)
An additional 64 bytes of EPROM are One Time
Programmable.
The M39208 EEPROM memory block may be writ-
ten by byte or by page of 64 bytes and the integrity
DESCRIPTION (Cont’d)
A3
A0
DQ0
A7
A4
A13
A11
DQ7
A14
VSS
G
DQ5
DQ1
DQ2
DQ3
DQ4
DQ6
A17
W
A16
A12
VCC
A15
AI02587
M39208
8
1
9
16
17
24
25
32
A9
A10
A8
EF
A6
A1
A5
A2
EE
Figure 2. TSOP Pin Connections
of the data can be secured with the help of the
Software Data Protection (SDP).
The M39208 Flash Memory block offers 4 sectors
of 64 Kbytes, each sector may be erased individu-
ally, and programmed Byte-by-Byte. Each sector
can be separately protected and unprotected
against program and erase. Sector erasure may be
suspended, while data is read from other sectors
of the Flash memory block (or EEPROM memory
block), and then resumed.
During a Program or Erase cycle in the Flash
memory block or during a Write in the EEPROM
memory block, the status of the M39208 internal
logic can be read on the Data Outputs DQ7,DQ6,
DQ5 and DQ3.
PIN DESCRIPTION
Address Inputs (A0-A17). The address inputs for
the memory array are latched during a write opera-
tion. A0-A12 access locations in the EEPROM
memory block A0-A17 access locations in the Flash
memory block. The memory block selected is given
by the state on the EE and EF inputs respectively.
When a specific voltage (VID) is applied on the A9
address input, additional specific areas can be
accessed: Read the Manufacturer identifier, Read
the Flash block identifier, Read/Write the EEPROM
block identifier, Verify the Flash Sector Protection
Status.
Data Input/Output (DQ0-DQ7). A write operation
inputs one byte which is latched when EE (or EF)
and Write Enable W are driven active.
Data read is valid when one Chip Enable (Chip
Enable Flash or Chip Enable EEPROM) and Out-
put Enable are driven active. The output is high
2/30
M39208
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