參數(shù)資料
型號: M38851M1-XXXHP
廠商: Renesas Technology Corp.
英文描述: Single 2.7-V High-Slew-Rate Rail-to-Rail Output Operational Amplifier With Shutdown 8-SOIC -40 to 125
中文描述: 單芯片8位CMOS微機
文件頁數(shù): 63/103頁
文件大小: 1580K
代理商: M38851M1-XXXHP
3885 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
61
Operation Mode
Figure 55 shows the timing of continuous mode; Figure 56 shows
that of Quiet mode.
(1) Continuous mode
Serialized IRQ cycles starts in Continuous mode after CPU reset
in the case of LRESET = “L” and the previous stop frame being 3
clocks.
Fig. 55 Timing diagram of Continuous mode
Fig. 56 Timing diagram of Quiet mode
(2) Quiet mode
At clock stop, clock slow down or the pulse width of the last stop
frame being 2 clocks, it is the Quiet mode.
In this mode the 3885 drives the SERIRQ line to “L” in the 1st
clock. After that the host drives the rest start frame (Note). The
IRQ1 frame, IRQ12 frame or IRQx frame is asserted.
After receiving the start frame; the IRQ1 Frame, IRQ12 Frame or
IRQx frame is asserted.
Note : If the pulse width of “L” is less than 4 clocks, or 9 clocks or
more; the start frame is not detected and the next start (the
falling edge of SERIRQ) is waited.
Note: When the sum of pulse width of “L” driven by the 3885 in
the 1st clock and driven by the host in the rest clocks is
within 4 to 8-clock cycles, the start frame is detected.
If the sum of pulse width of “L” is less than 4 clocks, or 9
clocks or more; the start frame is not detected and the next
start (the falling edge of SERIRQ) is waited.
Start frame (Note)
IRQ0 frame
IRQ1 frame
Host
3885
LCLK
SERIRQ line
Drive source
IRQ2 frame
IRQ3 frame
HostSERIRQ output
3885SERIRQ output
Note: The start frame count is 4 clocks as exemple.
Start frame (Note)
IRQ0 frame
IRQ1 frame
Host
3885
LCLK
SERIRQ line
Drive source
IRQ2 frame
IRQ3 fra
Host SERIRQ output
3885SERIRQ output
3885
Note: The start frame count is 4 clocks as exemple
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