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2-10
3850 Group (Spec. H) User’s Manual
APPLICATION
2.2 Interrupt
At reset
At detection of either rising or
falling edge of INT0 input
Reserved
At detection of either rising or
falling edge of INT1 input
At detection of either rising or
falling edge of INT2 input
At detection of either rising or
falling edge of INT3 input
At completion of serial I/O2 data
transfer
Reserved
At timer X underflow
At timer Y underflow
At timer 1 underflow
At timer 2 underflow
At completion of serial I/O1 data
reception
At completion of serial I/O1
transfer shift or when transmis-
sion buffer is empty
At detection of either rising or
falling edge of CNTR0 input
At detection of either rising or
falling edge of CNTR1 input
At completion of A-D conversion
At BRK instruction execution
Reset (Note 2)
INT0
Reserved
INT1
INT2
INT3
Serial I/O2
Reserved
Timer X
Timer Y
Timer 1
Timer 2
Serial I/O1
received
Serial I/O1
transmit
CNTR0
CNTR1
A-D converter
BRK instruction
2.2.3 Interrupt source
The 3850 group permits interrupts of 15 sources. These are vector interrupts with a fixed priority system.
Accordingly, when two or more interrupt requests occur during the same sampling, the higher-priority
interrupt is accepted first. This priority is determined by hardware, but a variety of priority processing can
be performed by software, using an interrupt enable bit and an interrupt disable flag.
For interrupt sources, vector addresses and interrupt priority, refer to Table 2.2.1.
Table 2.2.1 Interrupt sources, vector addresses and priority of 3850 group
Interrupt Request
Generating Conditions
Remarks
Interrupt Source
Low
FFFC16
FFFA16
FFF816
FFF616
FFF416
FFF216
FFF016
FFEE16
FFEC16
FFEA16
FFE816
FFE616
FFE416
FFE216
FFE016
FFDE16
FFDC16
High
FFFD16
FFFB16
FFF916
FFF716
FFF516
FFF316
FFF116
FFEF16
FFED16
FFEB16
FFE916
FFE716
FFE516
FFE316
FFE116
FFDF16
FFDD16
Priority
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Notes 1: Vector addresses contain interrupt jump destination addresses.
2: Reset function in the same way as an interrupt with the highest priority.
Vector Addresses (Note 1)
Non-maskable
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Switch by Serial I/O2/INT3 interrupt
source bit
STP release timer underflow
Valid when serial I/O1 is selected
External interrupt
(active edge selectable)
External interrupt
(active edge selectable)
Non-maskable software interrupt