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參數(shù)資料
| 型號(hào)： | M381L3223EUM-CCC |
| 元件分類： | DRAM |
| 英文描述： | 32M X 72 DDR DRAM MODULE, 0.65 ns, DMA184 |
| 封裝： | ROHS COMPLIANT, DIMM-184 |
| 文件頁(yè)數(shù)： | 5/22頁(yè) |
| 文件大?。?/td> | 402K |
| 代理商： | M381L3223EUM-CCC |
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DDR SDRAM
256MB, 512MB Unbuffered DIMM
Rev. 1.2 July 2005
Output Load Circuit (SSTL_2)
Output
Z0=50
CLOAD=30pF
VREF
=0.5*VDDQ
RT=50
Vtt=0.5*VDDQ
(VDD=2.5V, VDDQ=2.5V, TA= 25
°C, f=1MHz)
Parameter
Symbol
M368L3223ET(U)
M381L3223ET(U)
Unit
Min
Max
Min
Max
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
CIN1
49575160
pF
Input capacitance(CKE0)
CIN2
42
50
44
53
pF
Input capacitance( CS0)
CIN3
42
50
44
53
pF
Input capacitance( CLK0, CLK1,CLK2)
CIN4
25
30
25
30
pF
Input capacitance(DM0~DM7, DM8(for ECC))
CIN5
6767
pF
Data & DQS input/output capacitance(DQ0~DQ63)
Cout1
6767
pF
Data input/output capacitance (CB0~CB7)
Cout2
-
6
7
pF
Parameter
Symbol
M368L6423ET(U)
M381L6423ET(U)
Unit
Min
Max
Min
Max
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
CIN1
65
816987
pF
Input capacitance(CKE0,CKE1)
CIN2
42
50
44
53
pF
Input capacitance( CS0, CS1)
CIN3
42
50
44
53
pF
Input capacitance( CLK0, CLK1,CLK2)
CIN4
28
34
28
34
pF
Input capacitance(DM0~DM7, DM8(for ECC))
CIN5
10
12
10
12
pF
Data & DQS input/output capacitance(DQ0~DQ63)
Cout1
10
12
10
12
pF
Data input/output capacitance (CB0~CB7)
Cout2
-
10
12
pF
Note :
1. VID is the magnitude of the difference between the input level on CK and the input on CK.
2. The value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC level of the same.
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Parameter/Condition
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage, DQ, DQS and DM signals
VIH(AC)
VREF + 0.31
V
3
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
VIL(AC)
VREF - 0.31
V
3
Input Differential Voltage, CK and CK inputs
VID(AC)
0.7
VDDQ+0.6
V
1
Input Crossing Point Voltage, CK and CK inputs
VIX(AC)
0.5*VDDQ-0.2
0.5*VDDQ+0.2
V
2
11.0 Input/Output Capacitance
10.0 AC Operating Conditions
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