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Rev.
No.
Rev.
date
1.00
First Edition
970507
2.00
The following are revised:
980731
REVISION DESCRIPTION LIST
M37736MHBXXXGP Datasheet
(1)
Revision Description
Page
P4
P10
0
– P10
7
P5
Right column
Line 7
P5
Fig. 1
P9
Right column
Line 12
P66
Left column
Line 2
P66
Fig.71
P67
Fig. 73
P68
Right column
Line 2
Previous Version
Additionally, the internal ROM area can be modi-
fied by software.
Notes 1.
Internal ROM area can be modified. (Re-
fer to the section on ROM area modifica-
tion function.)
The CPU operates on an internal clock
φ
’s fre-
quency which is obtained by dividing the external
clock frequency f(X
IN
) by two.
The internal ROM size and its address area of the
M37736MHBXXXGP can be modified by the
memory allocation control register’s bits 0,1 and 2
shown in Figure 71.
Figure 73 shows the memory allocation in which
the internal ROM size and its address area are
modified.
Memory allocation selection bits
ROM size (ROM area)
0 0 0 : 124 Kbytes (addresses 001000
16
– 01FFFF
16
)
0 0 1 : 120 Kbytes (addresses 002000
16
– 01FFFF
16
)
1 1 0 : 96 Kbytes (addresses 008000
16
– 01FFFF
16
)
1 1 1 : 32 Kbytes (addresses 008000
16
– 00FFFF
16
)
Refer to page (2).
The M37736MHBXXXGP has 28 powerful
addressing modes. Refer to the SINGLE-CHIP 16-
BIT MICROCOMPUTERS DATA BOOK for the
details of each addressing mode.
MACHINE INSTRUCTION LIST
The M37736MHBXXXGP has 103 machine
instructions. Refer to the SINGLE-CHIP 16-BIT
MICROCOMPUTERS DATA BOOK for details.
Revised Version
Additionally, the internal ROM and RAM area can
be modified by software.
Notes 1.
Internal ROM and RAM area can be
modified. (Refer to the section on ROM
area modification function.)
The CPU operates on an internal clock
φ
’s
frequency.
The internal ROM size and RAM size of the
M37736MHBXXXGP can be modified by the
memory allocation control register’s bits 0,1 and 2
shown in Figure 71.
Figure 73 shows the memory allocation in which
the internal ROM size and RAM size are modified.
Memory allocation selection bits
ROM size RAM size
0 0 0 : 124 Kbytes 3968 bytes
0 0 1 : 120 Kbytes 3968 bytes
0 1 0 : 60 Kbytes 2048 bytes
1 0 0 : 32 Kbytes 2048 bytes
1 0 1 : 16 Kbytes 2048 bytes
1 1 0 : 96 Kbytes 3968 bytes
Refer to page (3).
The M37736MHBXXXGP has 28 powerful
addressing modes. Refer to the “7700 Family
Software Manual” for the details.
MACHINE INSTRUCTION LIST
The M37736MHBXXXGP has 103 machine
instructions. Refer to the “7700 Family Software
Manual” for the details.
Previous Version
P10
0
– P10
7
EVL0, EVL1
Output port P10
–
I/O
In addition to having the same functions as port P0 in the single-chip mode, P10
4
– P10
7
also
function as input pins for key input interrupt input (KI
0
– KI
3
).
These pins should be left open.
Output
Revised Version
P10
0
– P10
7
I/O port P10
I/O
In addition to having the same functions as port P0 in the single-chip mode, P10
4
– P10
7
also
function as input pins for key input interrupt input (KI
0
– KI
3
).
These pins should be left open.
EVL0, EVL1
–
Output