參數(shù)資料
型號(hào)： M37517F8HP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù)： 5/98頁(yè)
文件大?。?/td> 886K
代理商： M37517F8HP
Rev.1.01
Aug 02, 2004
page 13 of 96
7517 Group
b7
b0
b7
b0
b7
b0
b7
b0
b7
b0
Interrupt edge selection register
INT0 active edge selection bit
INT1 active edge selection bit
INT2 active edge selection bit
INT3 active edge selection bit
Serial I/O2 / INT3 interrupt source bit
Current integrate/A/D converter interrupt source bit
Over current detect / Serial I/O1 transmit interrupt source bit
Not used (returns “0” when read)
(INTEDGE : address 003A16)
0 : Falling edge active
1 : Rising edge active
0 : INT3 interrupt selected
1 : Serial I/O2 interrupt selected
Interrupt request register 1
INT0 interrupt request bit
SCL/SDA interrupt request bit
INT1 interrupt request bit
INT2 interrupt request bit
INT3 / Serial I/O2 interrupt request bit
I2C interrupt request bit
Timer X interrupt request bit
Timer Y interrupt request bit
Interrupt control register 1
0 : No interrupt request issued
1 : Interrupt request issued
(IREQ1 : address 003C16)
(ICON1 : address 003E16)
Interrupt request register 2
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Serial I/O1 reception interrupt request bit
Serial I/O1 transmit / Over current detect interrupt request bit
CNTR0 interrupt request bit
CNTR1 interrupt request bit
AD converter /current integrate interrupt request bit
Not used (returns “0” when read)
(IREQ2 : address 003D16)
Interrupt control register 2
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Serial I/O1 reception interrupt enable bit
Serial I/O1 transmit / Over current detect interrupt enable bit
CNTR0 interrupt enable bit
CNTR1 interrupt enable bit
AD converter / current integrate interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit)
0 : Interrupts disabled
1 : Interrupts enabled
(ICON2 : address 003F16)
0 : No interrupt request issued
1 : Interrupt request issued
INT0 interrupt enable bit
SCL/SDA interrupt enable bit
INT1 interrupt enable bit
INT2 interrupt enable bit
INT3 / Serial I/O2 interrupt enable bit
I2C interrupt enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
0 : Interrupts disabled
1 : Interrupts enabled
0 : AD converter interrupt selected
1 : Current integrate interrupt selected
0 : Serial I/O1 transmit interrupt selected
1 : Over current detect interrupt selected
Fig. 9 Interrupt control
Fig. 10 Structure of interrupt-related registers (1)
Interrupt disable flag (I)
Interrupt request
Interrupt request bit
Interrupt enable bit
BRK instruction
Reset
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