59
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
M37225M6–XXXSP, M37225M8–XXXSP
M37225ECSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
(3) OSD input/output pin control
The OSD output pins R, G, B, OUT1 and OUT2 can also function as
ports P5
2
, P5
3
, P5
4
, P5
5
, P1
0
respectively. Switch either OSD out-
put function or port function by the OSD port control register (ad-
dress 00CB
16
).
The input polarity of the H
SYNC
, V
SYNC
and output polarity of signals
R, G, B, OUT1 and OUT2 can be specified with the OSD I/O polarity
register (address 00EB
16
). Set a bit to “0” to specify positive polarity;
Fig. 8.10.6 OSD I/O Polarity Register
7 b
6 b
5 b
4 b
3 b
2 b
1 b
0
O
S
D
I
/
O
p
o
l
a
r
i
t
y
r
e
g
i
s
t
e
r
(
O
P
C
)
[
A
d
d
r
e
s
s
0
0
E
B
1
6
]
B
N
a
m
e
F
u
n
c
t
i
o
n
s
A
f
t
e
r
r
e
R
W
O
S
D
I
/
O
P
o
l
a
r
i
t
y
R
e
g
i
s
t
e
r
0
H
S
s
w
Y
i
t
N
c
C
h
i
b
n
p
i
t
u
(
t
p
P
o
C
l
a
0
r
)
i
t
y
O
0
1
1
1
1
:
P
N
o
e
s
g
i
a
t
i
v
t
e
v
e
p
o
p
l
o
a
l
r
a
i
r
t
y
i
t
y
i
n
i
p
n
u
p
t
u
:
i
t
0
1
0
:
P
N
o
e
s
g
i
a
t
i
v
t
e
v
e
p
o
p
l
o
a
l
r
a
i
r
t
y
i
t
y
i
n
i
p
n
u
p
t
u
:
i
t
0
2
R
b
U
s
w
/
G
t
/
O
B
o
C
u
2
t
p
)
u
t
p
o
l
a
r
i
t
y
s
w
i
t
c
h
i
(
P
0
:
P
N
o
e
s
g
i
a
t
i
v
t
e
v
e
p
o
p
l
o
a
l
r
a
i
r
t
y
i
t
y
o
u
o
t
u
p
t
u
p
t
u
:
i
t
0
3
0
V
S
s
w
Y
i
N
t
c
C
h
i
n
b
p
i
t
u
(
t
O
p
P
o
C
l
a
1
r
i
t
y
)
R
W
R
W
R
W
R
W
4
O
s
a
b
i
a
(
O
a
(
O
U
w
T
t
c
2
h
o
b
u
i
t
p
(
u
O
t
P
p
C
o
l
a
)
r
i
t
y
i
t
4
0
1
1
1
:
P
N
o
e
s
g
i
a
t
i
v
t
e
v
e
p
o
p
l
o
a
l
r
a
i
r
t
y
i
t
y
o
u
o
t
u
p
t
u
p
t
u
:
i
t
0
5
R
s
(
t
O
e
r
c
C
o
5
l
)
o
r
R
c
o
n
t
r
o
l
t
P
0
:
N
O
o
u
t
o
p
u
u
t
t
p
u
t
:
0
6
R
s
P
t
C
e
r
6
c
)
o
l
o
r
G
c
o
n
t
r
o
l
b
i
t
0
7
R
s
P
t
C
e
r
7
c
)
o
l
o
r
B
c
o
n
t
r
o
l
b
i
t
0
1
:
N
O
o
u
t
o
p
u
u
t
t
p
u
t
:
0
R
W
R
W
R
W
R W
O
T
t
c
1
h
o
b
u
i
t
p
(
u
O
t
P
p
C
o
l
a
)
r
i
t
y
i
t
3
0
:
P
N
o
e
s
g
i
a
t
i
v
t
e
v
e
p
o
p
l
o
a
l
r
a
i
r
t
y
i
t
y
o
u
o
t
u
p
t
u
p
t
u
:
i
t
0
:
N
O
o
u
t
o
p
u
u
t
t
p
u
t
:
set it to “1” to specify negative polarity.
Figure 8.10.6 shows the OSD I/O polarity register and Figure 8.10.7
shows the OSD port control register.
Fig. 8.10.7 OSD Port Control Register
7 b
0
6 b
5 b
4 b
3 b
2 b
1 b
0
0
0
O
S
D
p
o
r
t
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
P
F
)
[
A
d
d
r
e
s
s
0
0
C
B
1
6
]
b
N
a
m
e
F
u
n
c
t
i
o
n
s
A
f
t
e
r
r
e
s
e
t
R W
O
S
D
P
o
r
t
C
o
n
t
r
o
l
R
e
g
i
s
t
e
r
0
,
1
0
R W
F
i
x
t
h
e
s
e
b
i
t
s
t
o
“
0
”
2
0
1
1
1
1
1
:
R
P
o
s
r
i
t
g
n
P
a
5
2
l
o
o
u
u
t
t
p
p
u
u
t
t
:
0
R W
3
P
s
o
s
e
o
s
e
o
s
e
i
o
e
r
l
e
t
c
P
t
5
3
i
o
o
n
u
t
t
p
(
u
P
t
s
3
i
g
S
n
E
a
L
l
)
b
i
5
0
:
G
P
o
s
r
i
t
g
n
P
a
5
3
l
o
o
u
u
t
t
p
p
u
u
t
t
:
0
R W
4
P
r
l
e
t
c
P
t
5
4
i
o
o
n
u
t
t
p
(
u
P
t
s
4
i
g
S
n
E
a
L
l
)
b
i
5
0
:
B
P
o
s
i
t
g
n
P
a
5
4
l
o
o
u
u
t
p
t
p
u
u
t
:
r
t
0
R W
5
P
r
l
e
t
c
P
t
5
5
i
o
o
n
u
t
t
p
(
u
P
t
s
5
i
g
S
n
E
a
L
l
)
b
i
5
0
:
O
P
U
o
T
r
t
1
P
5
5
s
i
g
n
o
a
u
l
p
o
u
u
t
t
p
u
t
:
t
0
R W
6
P
r
l
e
t
c
P
t
1
0
i
o
o
n
u
t
t
p
(
u
O
t
U
s
i
T
g
n
2
a
S
l
b
i
E
L
)
0
:
P
O
o
U
r
t
T
P
2
1
0
o
s
t
i
g
u
n
t
a
l
o
u
t
p
u
t
:
u
p
0
R W
P
s
o
e
r
l
e
t
c
P
t
5
2
i
o
o
n
u
t
t
p
(
u
P
t
s
2
i
g
S
n
E
a
L
l
)
b
i
5
7
0
R W
F
x
t
h
i
s
b
i
t
t
o
“
0
”