- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45030 > M37221M4-XXXSP 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42 PDF資料下載
參數(shù)資料
| 型號(hào)： | M37221M4-XXXSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42 |
| 封裝： | 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42 |
| 文件頁(yè)數(shù)： | 53/114頁(yè) |
| 文件大小： | 1653K |
| 代理商： | M37221M4-XXXSP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)當(dāng)前第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)
42
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
M37221M4/M8/MA–XXXSP, M37221M6–XXXSP/FP
M37221EASP/FP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
Fig. 8.6.12 Address Data Communication Format
SSlave address
A
DataA
DataA/A
P
R/W
7 bits
“0”
1 to 8 bits
SSlave address
A
Data
AData
A
P
7 bits
“1”
1 to 8 bits
(1) A master-transmitter transmits data to a slave-receiver
S
Slave address
1st 7 bits
A
Data
7 bits
“0”
8 bits
1 to 8 bits
(2) A master-receiver receives data from a slave-transmitter
Slave address
2nd byte
A
DataA/A
P
1 to 8 bits
S
Slave address
1st 7 bits
A
7 bits
“0”
8 bits
7 bits
(3) A master-transmitter transmits data to a slave-receiver with a 10-bit address
Slave address
2nd byte
Data
1 to 8 bits
Sr
Slave address
1st 7 bits
A
Data
A
P
1 to 8 bits
“1”
(4) A master-receiver receives data from a slave-transmitter with a 10-bit address
S: START conditionP : STOP condition
A: ACK bitR/W : Read/Write bit
Sr: Restart condition
From master to slave
From slave to master
R/W
8.6.12 Precautions when using multi-master
I2C-BUS interface
(1) Read-modify-write instruction
The precautions when the raead-modify-write instruction such as SEB,
CLB etc. is executed for each register of the multi-master I2C-BUS
interface are described below.
I2C data shift register (S0)
When executing the read-modify-write instruction for this register
during transfer, data may become a value not intended.
I2C address register (S0D)
When the read-modify-write instruction is executed for this register
at detecting the STOP condition, data may become a value not
______
intended. It is because hardware changes the read/write bit (RBW)
at the above timing.
I2C status register (S1)
Do not execute the read-modify-write instruction for this register
because all bits of this register are changed by hardware.
I2C control register (S1D)
When the read-modify-write instruction is executed for this register
at detecting the START condition or at completing the byte transfer,
data may become a value not intended. Because hardware changes
the bit counter (BC0–BC2) at the above timing.
I2C clock control register (S2)
The read-modify-write instruction can be executed for this register.
(2) START condition generating procedure us-
ing multi-master
Procedure example (The necessary conditions of the generating
procedure are described as the following to ).
LDA
—
(Taking out of slave address value)
SEI
(Interrupt disabled)
BBS 5,S1,BUSBUSY
(BB flag confirming and branch process)
BUSFREE:
STA S0
(Writing of slave address value)
LDM #$F0, S1
(Trigger of START condition generating)
CLI
(Interrupt enabled)
BUSBUSY:
CLI
(Interrupt enabled)
Use “STA,” “STX” or “STY” of the zero page addressing instruction
for writing the slave address value to the I2C data shift register.
Use “LDM” instruction for setting trigger of START condition gener-
ating.
{Write the slave address value of above and set trigger of START
condition generating of above continuously shown the above
procedure example.
Disable interrupts during the following three process steps:
BB flag confirming
Writing of slave address value
Trigger of START condition generating
When the condition of the BB flag is bus busy, enable interrupts
immediately.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37224M3-XXXSP | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42 |
| M37225M6-XXXSP | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42 |
| M37225MA-XXXSP | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42 |
| M37225MC-XXXSP | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42 |
| M37225ECSP | 8-BIT, OTPROM, 8.1 MHz, MICROCONTROLLER, PDIP42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37221M6 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER |
| M37221M6_03 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER |
| M37221M6-054SP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER |
| M37221M6-079SP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER |
| M37221M6-286SP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。