- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45029 > M37150M8-XXXFP 8-BIT, MROM, 8.95 MHz, MICROCONTROLLER, PDSO42 PDF資料下載
參數(shù)資料
| 型號： | M37150M8-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.95 MHz, MICROCONTROLLER, PDSO42 |
| 封裝： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42 |
| 文件頁數(shù)： | 71/142頁 |
| 文件大小： | 1712K |
| 代理商： | M37150M8-XXXFP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁當前第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M37150M6/M8/MA/MC/MF-XXXFP, M37150EFFP
33
Rev. 1.0
8.6.3 I2C Clock Control Register
The I2C clock control register (address 00FA16) is used to set ACK
control, SCL mode and SCL frequency.
(1) Bits 0 to 4: SCL frequency control bits (CCR0–CCR4)
These bits control the SCL frequency.
(2) Bit 5: SCL mode specification bit (FAST MODE)
This bit specifies the SCL mode. When this bit is set to “0,” the stan-
dard clock mode is set. When the bit is set to “1,” the high-speed
clock mode is set.
(3) Bit 6: ACK bit (ACK BIT)
This bit sets the SDA status when an ACK clock is generated. When
this bit is set to “0,” the ACK return mode is set and SDA goes to
LOW at the occurrence of an ACK clock. When the bit is set to “1,”
the ACK non-return mode is set. The SDA is held in the HIGH status
at the occurrence of an ACK clock.
However, when the slave address matches the address data in the
reception of address data at ACK BIT = “0,” the SDA automatically
goes to LOW (ACK is returned). If there is a mismatch between the
slave address and the address data, the SDA automatically goes to
HIGH (ACK is not returned).
ACK clock: Clock for acknowledgement
Fig. 8.6.4 I2C Clock Control Register
(4) Bit 7: ACK clock bit (ACK)
This bit specifies a mode of acknowledgment which is an acknowl-
edgment response of data transmission. When this bit is set to “0,”
the no ACK clock mode is set. In this case, no ACK clock occurs
after data transmission. When the bit is set to “1,” the ACK clock
mode is set and the master generates an ACK clock upon comple-
tion of each 1-byte data transmission.The device for transmitting
address data and control data releases the SDA at the occurrence of
an ACK clock (make SDA HIGH) and receives the ACK bit generated
by the data receiving device.
Note: Do not write data into the I2C clock control register during transmission.
If data is written during transmission, the I2C clock generator is reset, so
that data cannot be transmitted normally.
b7 b6 b5 b4 b3 b2 b1 b0
I2C clock control register (S2) [Address 00FA16]
I2C Clock Control Register
0
to
4
SCL frequency control
bits
(CCR0 to CCR4)
7
5
6
SCL mode
specification bit
(FAST MODE)
0: Standard clock mode
1: High-speed clock mode
0
Standard
clock
mode
Functions
Name
After reset
RW
B
0
ACK bit
(ACK BIT)
ACK clock bit
(ACK)
0: ACK is returned.
1: ACK is not returned.
0: No ACK clock
1: ACK clock
High speed
clock mode
Setup disabled
00 to 02
Setup disabled
333
03
Setup disabled
250
04
100
400 (See note)
05
83.3
166
06
500/CCR value 1000/CCR value
...
17.2
34.5
1D
16.6
33.3
1E
16.1
32.3
1F
(
φ = at 4 MHz, unit : kHz)
Notes 1. At 400kHz in the high-speed clock mode, the duty is as below .
“0” period : “1” period = 3 : 2
In the other cases, the duty is as below.
“0” period : “1” period = 1 : 1
2.At FSCIN = 3.58 MHz,
φ = 8.95/2 MHz
At FSCIN = 4.43 MHz,
φ = 8.86/2 MHz
Values shown in table is as below :
At FSCIN = 3.58 MHz, each value 8.95/8
At FSCIN = 4.43 MHz, each value 8.86/8
Setup value
of CCR4–
CCR0
RW
相關PDF資料 |
PDF描述 |
|---|---|
| M37150MF-XXXFP | 8-BIT, MROM, 8.95 MHz, MICROCONTROLLER, PDSO42 |
| M37150MC-XXXFP | 8-BIT, MROM, 8.95 MHz, MICROCONTROLLER, PDSO42 |
| M37151MC-XXXFP | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDSO42 |
| M37151MF-XXXFP | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDSO42 |
| M37151M6-XXXFP | 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDSO42 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M37150MA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37150MA-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37150MC | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37150MC-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37150MF | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SNGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
發(fā)布緊急采購，3分鐘左右您將得到回復。