參數(shù)資料
型號: M34554EDFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù): 99/138頁
文件大?。?/td> 1082K
代理商: M34554EDFP
Rev.3.00
Aug 06, 2004
page 63 of 136
REJ03B0043-0300Z
4554 Group
Writing to reload register R1, R3, R4H
When writing data to reload register R1, reload register R3 or re-
load regiser R4H while timer 1, timer 3 or timer 4 is operating,
avoid a timing when timer 1, timer 3 or timer 4 underflows.
Timer 4
Avoid a timing when timer 4 underflows to stop timer 4.
When “H” interval extension function of the PWM signal is set to
be “valid”, set “1” or more to reload register R4H.
Timer 5
Stop timer 5 counting to change its count source.
Timer input/output pin
Set the port C output latch to “0” to output the PWM signal from
C/CNTR pin.
Watchdog timer
The watchdog timer function is valid after system is released
from reset. When not using the watchdog timer function, execute
the DWDT instruction and the WRST instruction continuously,
and clear the WEF flag to “0” to stop the watchdog timer function.
The watchdog timer function is valid after system is returned from
the power down state. When not using the watchdog timer func-
tion, execute the DWDT instruction and the WRST instruction
continuously every system is returned from the power down
state, and stop the watchdog timer function.
When the watchdog timer function and power down function are
used at the same time, execute the WRST instruction before sys-
tem enters into the power down state and initialize the flag
WDF1.
Multifunction
Be careful that the output of ports D8 and D9 can be used even
when INT0 and INT1 pins are selected.
Be careful that the input/output of port D7 can be used even
when input of CNTR0 pin are selected.
Be careful that the input of port D7 can be used even when out-
put of CNTR0 pin are selected.
Be careful that the “H” output of port C can be used even when
output of CNTR1 pin are selected.
Program counter
Make sure that the PCH does not specify after the last page of
the built-in ROM.
LIST OF PRECAUTIONS
Noise and latch-up prevention
Connect a capacitor on the following condition to prevent noise
and latch-up;
connect a bypass capacitor (approx. 0.1
F) between pins VDD
and VSS at the shortest distance,
equalize its wiring in width and length, and
use relatively thick wire.
In the One Time PROM version, CNVSS pin is also used as VPP
pin. Accordingly, when using this pin, connect this pin to VSS
through a resistor about 5 k
(connect this resistor to CNVSS/
VPP pin as close as possible).
Register initial values 1
The initial value of the following registers are undefined after sys-
tem is released from reset. After system is released from reset,
set initial values.
Register Z (2 bits)
Register D (3 bits)
Register E (8 bits)
Register initial values 2
The initial value of the following registers are undefined at RAM back-
up. After system is returned from RAM back-up, set initial values.
Register Z (2 bits)
Register X (4 bits)
Register Y (4 bits)
Register D (3 bits)
Register E (8 bits)
Stack registers (SKS)
Stack registers (SKs) are eight identical registers, so that subrou-
tines can be nested up to 8 levels. However, one of stack
registers is used respectively when using an interrupt service
routine and when executing a table reference instruction. Accord-
ingly, be careful not to over the stack when performing these
operations together.
Prescaler
Stop counting and then execute the TABPS instruction to read
from prescaler data.
Stop counting and then execute the TPSAB instruction to set
prescaler data.
Timer count source
Stop timer 1, 2, 3, 4 and LC counting to change its count source.
Reading the count value
Stop timer 1, 2, 3 or 4 counting and then execute the data read
instruction (TAB1, TAB2, TAB3, TAB4) to read its data.
Writing to the timer
Stop timer 1, 2, 3, 4 or LC counting and then execute the data
write instruction (T1AB, T2AB, T3AB, T4AB, TLCA) to write its
data.
10
13
11
12
14
15
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