參數(shù)資料
型號: M34282M1-XXXGP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝: 0.225 INCH, 0.65 MM PITCH, PLASTIC, SSOP-20
文件頁數(shù): 10/70頁
文件大?。?/td> 625K
代理商: M34282M1-XXXGP
MITSUBISHI
ELECTRIC
18
MITSUBISHI MICROCOMPUTERS
4282 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
(1) Internal state at reset
Table 6 shows port state at reset, and Figure 20 shows internal
state at reset (they are retained after system is released from
reset).
The contents of timers, registers, flags and RAM except shown
in Figure 20 are undefined, so set the initial value to them.
0
000
0
00
0
000
0
000
0
000
00
0
1
111
1
111
00
0
000
11
Fig. 20 Internal state at reset
Table 6 Port state at reset
Name
D0–D3
D4–D7
G0–G3
E0, E1
CARR
State at reset
High impedance state
High impedance state (Pull-down transistor OFF)
“L” output
Note: The contents of all output latch is initialized to “0.”
VOLTAGE DROP DETECTION CIRCUIT
The built-in voltage drop detection circuit is designed to detect a
drop in voltage at operating and to reset the microcomputer if
the supply voltage drops below the specified value (Typ. 1.50 V)
or less.
Fig. 21 Voltage drop detection circuit operation waveform
The voltage drop detection circuit is stopped and power
dissipation is reduced in the RAM back-up mode with the
initialized CPU stopped.
Program counter (PC) ..............................................................
Address 0 in page 0 is set to program counter.
Power down flag (P) .................................................................
Timer 1 underflow flag (T1F) ...................................................
Timer 2 underflow flag (T2F) ...................................................
Timer control register V1 ..........................................................
Timer control register V2 ..........................................................
Port CARR output flag (CAR) ..................................................
Pull-down control register PU0 ................................................
Pull-down control register PU1 ................................................
Logic operation selection register LO ......................................
Most significant ROM code reference enable flag (URS)
Carry flag (CY) .........................................................................
Register A .................................................................................
Register B .................................................................................
Register X .................................................................................
Register Y .................................................................................
Stack pointer (SP) ....................................................................
VDD
Internal reset signal
Reset voltage
TYP 1.5V
(Note)
Note: The voltage drop detection circuit does not have
the hysteresis characteristics in the detected voltage.
Microcomputer starts operation
after f(XIN) is counted to 16384 times.
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