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SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
M32000D4BFP-80
6
PIN DESCRIPTION (1/3)
type
power
source
clock
pin name
VCC
VSS
CLKIN
name
power source
ground
clock input
I/O
–
–
input
function
All power source pins should be connected to VCC.
All ground pins should be connected to VSS.
Clock input pin. The M32000D4BFP-80 has an internal PLL
multiplier circuit, and an input clock which is 1/4 of the internal
operating frequency (when the internal operating frequency is
80 MHz, the CLKIN input is 20 MHz).
Connects a capacitor for the internal PLL.
PLLCAP
C connection
for PLL
power source
for PLL
ground
for PLL
reset
–
PLLVCC
–
Power source for the internal PLL.
PLLVSS
–
Ground for the internal PLL.
system
control
____
input
Internally resets the M32000D4BFP-80. It is also used to return
from standby mode and CPU sleep mode.
Sets the M32000D4BFP-80 default operation to either system
_
bus master (M/S = "H") or bus slave (M/S = "L").
When the M32000D4BFP-80 is set to bus slave, it does not carry
out a reset vector entry fetch after a reset.
The setting of M/S cannot be changed during operation.
Keep at either an "H" or an "L" level.
Input pin to request return from standby mode.
This is only accepted when STBY is "L" level.
It generates the wakeup interrupt.
Indicates that the M32000D4BFP-80 has switched to standby
mode. An "L" level is output while the device is in standby
mode.
The M32000D4BFP-80 has a 24-bit address (A8 to A31) bus for
a 16 MB address space. A31 is not output. During the write
cycle, the valid byte positions on the 16-bit data bus are output
as BCH or BCL. During the read cycle, the 16-bit data bus is
read, however,only data in the valid byte positions is transferred
to the M32000D4BFP-80.
Address bus pins are bidirectional. When accessing the internal
DRAM from an external bus master while the M32000D4BFP-80
is in the hold state, input the address from the system bus side.
16-bit data bus for connecting to external devices.
_
M/S
master/slave
input
______
wakeup
input
_____
standby
output
address
bus
A8 to A30
address bus
I/O
(Hi-Z)*
data bus
D0 to D15
data bus
I/O
(Hi-Z)*
* (Hi-Z): This pin goes to high-impedance in the hold state.