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Flash Memory
268
Mitsubishi microcomputers
M16C / 62P Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Under
development
Preliminary Specifications Rev.1.0
Specifications in this manual are tentative and subject to change.
Flash memory control register 0
Symbol
Address
After reset
FMR0
01B716
XX0000012
b7
b6
b5
b4
b3
b2 b1
b0
FMR00
Bit symbol
Bit name
Function
RW
0: Busy (being written or erased)
1: Ready
CPU rewrite mode select bit
(Note 1)
0: Disables CPU rewrite mode
1: Inables CPU rewrite mode
FMR01
0: Boot ROM area is accessed
1: User ROM area is accessed
Lock bit disable select bit
(Note 2)
0: Inables lock bit
1: Disables lock bit
Flash memory stop bit
(Note 3, Note 5))
User ROM area select bit
(Note 3)
(Effective in only boot mode)
FMR02
FMSTP
FMR05
0
RY/BY status flag
Reserved bit
Must always be set to “0”
0: Terminated normally
1: Terminated in error
Program status flag (Note 4)
FMR06
0: Terminated normally
1: Terminated in error
Erase status flag (Note 4)
FMR07
Flash memory control register 1
Symbol
Address
After reset
FMR1
01B516
0X00XX0X2
b7
b6
b5
b4
b3
b2 b1
b0
Bit symbol
Bit name
Function
EW1 mode select bit (
Note)
0: EW0 mode
1: EW1 mode
FMR11
0
Reserved bit
Must always be set to “0”
Reserved bit
The value in this bit when read is
indeterminate.
Reserved bit
Must always be set to “0”
0: Lock
1: Unlock
Lock bit status flag
FMR06
0
RW
RO
RW
RO
RW
(b0)
(b5-b4)
(b7)
(b4)
0: Enables flash memory operation
1: Stops flash memory operation
(placed in low power mode,
flash memory initialized)
Note 1: To set this bit to “1”, write “0” and then “1” in succession. Make sure no interrupts or DMA transfers
will occur before writing “1” after writing “0”.
Write to this bit when the NMI pin is in the high state. Also, while in EW0 mode, write to this bit from
a program in other than the flash memory.
Note 2: To set this bit to “1”, write “0” and then “1” in succession when the FMR01 bit = 1. Make sure no
interrupts or no DMA transfers will occur before writing “1” after writing “0”.
Note 3: Write to this bit from a program in other than the flash memory.
Note 4: This flag is cleared to “0” by executing the Clear Status command.
Note 5: Effective when the FMR01 bit = 1 (CPU rewrite mode). If the FMR01 bit = 0, although the FMR03 bit
can be set to “1” by writing “1” in a program, the flash memory is neither placed in low power mode
nor initialized.
Note 6: This status includes writing or reading with the Lock Bit Program or Read Lock Bit Status command.
Reserved bit
The value in this bit when read is
indeterminate.
(b3-b2)
RO
Note : To set this bit to “1”, write “0” and then “1” in succession when the FMR01 bit = 1. Make sure no
interrupts or no DMA transfers will occur before writing “1” after writing “0”.
The FMR01 and FMR11 bits both are cleared to “0” by setting the FMR01 bit to “0”.
Flash identification register
Symbol
Address
After reset
FIDR
01B416
XXXXXX002
b7
b6 b5
b4
b3
b2
b1
b0
FIDR0
Bit symbol
Bit name
Function
RW
0 0: M16C/62N, M3062GF8N type flash module
1 0: M16C/62P type flash module
1 1: M16C/62M, M16C/62A type flash module
Flash module type
identification value
Note: This register identifies on-chip flash module type of M16C/62 group. Note, however, no chip version is known
by this register. Follow the procedure described below for the identification.
(1) Write FF16 to FIDR register
(2) Read FIDR register
(3) Check two low-order bits of read value
Make sure no access to external memories or other SFRs or no interrupts or DMA transfers will occur between
the above two instructions no. 1 and no. 2.
FIDR1
Nothing is assigned.
When write, set to “0”. When read, their contents are indeterminate.
(b7-b2)
b1 b0
RO
Figure 1.27.4. FIDR Register and FMR0 and FMR1 Registers