參數(shù)資料
型號(hào)： M30624FGPGP-U5
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, LEAD FREE, PLASTIC, LQFP-100
文件頁(yè)數(shù)： 54/87頁(yè)
文件大?。?/td> 919K
代理商： M30624FGPGP-U5
VCC1 = VCC2 = 3V
M16C/62P Group (M16C/62P, M16C/62PT)
5. Electrical Characteristics (M16C/62P)
4
8
f
o
4
0
2
,
1
0
p
e
S
0
3
.
2
.
v
e
R
Z
0
3
2
0
-
1
0
B
3
0
J
E
R
page 58
Switching Characteristics
(VCC1 = VCC2 = 3V, VSS = 0V, at Topr = – 20 to 85oC / – 40 to 85oC unless otherwise specified)
Figure 5.12 Ports P0 to P14 Measurement Circuit
Table 5.45 Memory Expansion, Microprocessor Modes (for setting with no wait)
Symbol
Standard
Measuring
Condition
Max.
Min.
ParameterUnit
td(BCLK-AD)
Address Output Delay Time
30ns
th(BCLK-AD)
Address Output Hold Time (in relation to BCLK)
4
ns
th(BCLK-CS)
Chip Select Output Hold Time (in relation to BCLK)
4
ns
td(BCLK-ALE)
ALE Signal Output Delay Time
25ns
th(BCLK-ALE)
ALE Signal Output Hold Time
–4
ns
td(BCLK-RD)
RD Signal Output Delay Time
30ns
th(BCLK-RD)
RD Signal Output Hold Time
0
ns
td(BCLK-WR)
WR Signal Output Delay Time
30ns
th(BCLK-WR)
WR Signal Output Hold Time
0
ns
td(BCLK-DB)
Data Output Delay Time (in relation to BCLK)
40ns
th(BCLK-DB)
Data Output Hold Time (in relation to BCLK)(3)
4ns
th(WR-DB)
Data Output Hold Time (in relation to WR)(3)
ns
td(DB-WR)
Data Output Delay Time (in relation to WR)
ns
1. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 109
– 40
[ns]
td(BCLK-CS)
Chip Select Output Delay Time
30ns
th(RD-AD)
Address Output Hold Time (in relation to RD)
0
ns
th(WR-AD)
Address Output Hold Time (in relation to WR)
(NOTE 2)
ns
3. This standard value shows the timing when the output is off,
and does not show hold time of data bus.
Hold time of data bus varies with capacitor volume and pull-up
(pull-down) resistance value.
Hold time of data bus is expressed in
t = –CR X ln (1 – VOL / VCC2)
by a circuit of the right figure.
For example, when VOL = 0.2VCC2, C = 30pF, R = 1k
, hold time
of output “L” level is
t = – 30pF X 1k
X ln (1 – 0.2VCC2 / VCC2)
= 6.7ns.
DBi
R
C
(NOTE 1)
(NOTE 2)
2. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 109
[ns]
f(BCLK) is 12.5MHz or less.
– 10
NOTES:
HLDA Output Delay Time
40ns
td(BCLK-HLDA)
See Figure 5.12
P6
P7
P8
P10
P9
P0
P1
P2
P3
P4
P5
30pF
P11
P12
P13
P14
相關(guān)PDF資料
PDF描述
M30626FJPFP-U9 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
M3062AFCTFP-B 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
M3062AFCTGP-U7 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
M3062AFCVGP-U7 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
M3062JFHTFP-U7 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M30624FGPGPU5C 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M30624FGPMP#D3C 制造商:Renesas Electronics Corporation 功能描述:M16C FLASH 256K/20K, 24MHZ,DMA,I2C,IEBU - Trays
M30624FJNFP#D5 制造商:Renesas Electronics Corporation 功能描述:M16C 256K 3VFLASH/20K W/A-D,D-A,DMA,I2C - Trays
M30624MG-247FP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M30624MG-327FP 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*