![](http://datasheet.mmic.net.cn/30000/M30260M3A-XXXGP-U5_datasheet_2358673/M30260M3A-XXXGP-U5_233.png)
16. Programmable I/O Ports
page 219
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Symbol
Address
After reset
P6 to P8
03EC16, 03ED16, 03F016
Indeterminate
P10
03F416
Indeterminate
Port Pi register (i=6 to 8 and 10) (Note1)
Bit name
Function
Bit symbol
RW
b7
b6
b5
b4
b3
b2
b1
b0
Pi_0
Port Pi0 bit
Pi_1
Port Pi1 bit
Pi_2
Port Pi2 bit
Pi_3
Port Pi3 bit
Pi_4
Port Pi4 bit
Pi_5
Port Pi5 bit
Pi_6
Port Pi6 bit
Pi_7
Port Pi7 bit
The pin level on any I/O port which is
set for input mode can be read by
reading the corresponding bit in this
register.
The pin level on any I/O port which is
set for output mode can be controlled
by writing to the corresponding bit in
this register
0 : “L” level
1 : “H” level (Note 1)
(i = 6 to 8 and 10)
RW
Note1: Ports must be enabled using the PACR
In 48 pin version set PACR2, PACR1, PACR0 to "1002"
In 42 pin version set PACR2, PACR1, PACR0 to "0012"
Port P1 register (Note1)
Symbol
Address
After reset
P1
03E116
Indeterminate
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
P1_5
Port P15 bit
P1_6
Port P16 bit
P1_7
Port P17 bit
The pin level on any I/O port which is
set for input mode can be read by
reading the corresponding bit in this
register.
The pin level on any I/O port which is
set for output mode can be controlled
by writing to the corresponding bit in
this register
0 : “L” level
1 : “H” level
RW
Note1: Ports must be enabled using the PACR
In 48 pin version set PACR2, PACR1, PACR0 to "1002"
In 42 pin version set PACR2, PACR1, PACR0 to "0012"
Nothing is assigned. In an attempt to write to this bit, write “0”.
The value, if read, turns out to be indeterminate.
(b4-b0)
Port P9 register (Note1)
Symbol
Address
After reset
P9
03F116
Indeterminate
Bit name
Function
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
P9_0
Port P90 bit
P9_1
Port P91 bit
P9_2
Port P92 bit
P9_3
Port P93 bit
The pin level on any I/O port which is
set for input mode can be read by
reading the corresponding bit in this
register.
The pin level on any I/O port which is
set for output mode can be controlled
by writing to the corresponding bit in
this register
0 : “L” level
1 : “H” level
RW
Note1: Ports must be enabled using the PACR
In 48 pin version set PACR2, PACR1, PACR0 to "1002"
In 42 pin version set PACR2, PACR1, PACR0 to "0012"
Nothing is assigned. In an attempt to write to this bit, write “0”.
The value, if read, turns out to be indeterminate.
(b7-b4)
Figure 16.2.1. P1, P6, P7, P8, P9, and P10 Registers