![](http://datasheet.mmic.net.cn/30000/M30260M3A-XXXGP-U5_datasheet_2358673/M30260M3A-XXXGP-U5_258.png)
17. Flash Memory Version
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Note 1: Write the command code and data at even address.
Note 2: Refer to "Figure 17.8.4.1. Full Status Check and Handling Porcedure
for Each Error".
Note 3: Execute the clear status register command and block erase
command at least 3 times until an erase error is not generated when
an erase error is generated.
Write ‘xxD016’ to the highest-order
block address (Note 1)
Start
Block erase completed
YES
NO
Write command code ‘xx2016’
(Note 1)
FMR00=1?
Full status check
(Note 2,3)
Figure 17.7.5.1. Flow Chart of Block Erase Command (when not using erase suspend function)
17.7.5 Block Erase
By writing ‘xx2016’ in the first bus cycle and ‘xxD016’ in the second bus cycle to the highest-order (even
addresse of a block) and the auto-programming/erasing (erase and erase verify) start. The FMR00 bit
in the FMR0 register indicates whether the auto-programming operation has been completed. The
FMR00 bit is set to “0” during the auto-erasing operation and “1” when the auto-erasing operation is
completed. When using the erase-suspend function in EW0 mode, the FMR46 bit in the FMR4 register
indicates whether a flash memory has entered erase-suspend mode. The FMR46 bit is set to “0”
during auto-erasing operation and “1” when the auto-erasing operation is completed (entering erase-
suspend). After the completion of an auto-erasing operation, the FMR07 bit in the FMR0 register
indicates whether or not the auto erasing-operation has been completed as expected. (Refer to 17.8.4
Full Status Check). Also, each block disables erasing. (Refer to “Table 17.5.2.1”). Figure 17.7.5.1
shows a flow chart of the block erase command programming when not using the erase-suspend
function. Figure 17.7.5.2 shows a flow chart of the block erase command programming when using an
erase-suspend function. In EW1 mode, do not execute this command on the block where the rewrite
control program is allocated. In EW0 mode, the microcomputer enters read status register mode as
soon as the auto-erasing operation starts and the status register can be read. The SR7 bit in the status
register is set to “0” as soon as the auto-erasing operation starts. This bit is set to “1” when the auto-
erasing operation is completed. The microcomputer remains in read status register mode until the
read array command is written. Also excute the clear status register command and block erase com-
mand at least 3 times until an erase error is not generated when an erase error is generated.