參數(shù)資料
型號： M30100M2-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP32
封裝： 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁數(shù)： 116/166頁
文件大?。?/td> 2060K
代理商： M30100M2-XXXFP
Under
development
Tentative Specifications REV.E1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupts
50
External input enable register
Bit name
Function
Bit symbol
W
R
Symbol
Address
When reset
INTEN
009616
0016
INT0EN
b7
b6
b5
b4
b3
b2
b1
b0
INT0 input enable bit
0 : Disabled
1 : Enabled
0 : One edge
1 : Two edges
0 : Disabled
1 : Enabled
0 : One edge
1 : Two edges
0 : Disabled
1 : Enabled
INT0 input polarity select bit
INT1 input enable bit
INT1 input polarity select bit
INT2 input enable bit
INT2 input polarity select bit
0 : One edge
1 : Two edges
INT0PL
INT1EN
INT1PL
INT2EN
INT2PL
INT3 input enable bit
0 : Disabled
1 : Enabled
INT3EN
INT3 input polarity select bit
0 : One edge
1 : Two edges
INT3PL
INT0 input filter select register
Bit name
Function
Bit symbol
W
R
Symbol
Address
When reset
INT0F
001E16
XXXXX0002
INT0F0
b7
b6
b5
b4
b3
b2
b1
b0
INT0 input filter select bit
0 0 : No filter
0 1 : Filter with f1 sampling
1 0 : Filter with f8 sampling
1 1 : Filter with f32 sampling
0 : Disabled
1 : Enabled
UART0 receive hardware
interrupt enable bit (Note)
INT0F1
INT0F2
b1 b0
Note: Interrupts used for debugging purposes only.
––
(Note)
Note : This bit must be set in condition of INT0 pin one-shot trigger invalid (INOSTG="0").
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read,
turns out to be indeterminate.
_____
INT Interrupt
______
INT0 to INT3 are triggered by the edges of external inputs. The edge polarity of INT0 to INT2 is selected
using the polarity select bit (bit 4 of addresses 005D16, 005E16 and 005F16). Input to INT0 is available via
filter with three different sampling frequencies.
As to external interrupt input, an interrupt can be generated both at the rising edge and at the falling edge by
______
setting the INTi (i=0 to 3) input polarity select bit of the external input enable register (009616) to “1”. To
select both edges, set the polarity switching bit of the corresponding interrupt control register to “0” (falling
edge). To select one edge, set the polarity switching bit of the corresponding interrupt control register to
_________
either “1” (raising edge) or “0” (falling edge). Please note that when one edge is selected using INT3, the
polarity will be a falling edge.
After setting the external input enable register, clear the interrupt request bit, and then enable the corre-
sponding input interrupt. Moreover, you should write to the external input enable bit only under conditions
where the corresponding input interrupt is disabled.
Figure 1.12.10 shows the external input related registers.
Figure 1.12.10. External input related registers
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