參數(shù)資料
型號(hào): M2V64S2DTP-6
廠商: Mitsubishi Electric Corporation
英文描述: 64M Synchronous DRAM
中文描述: 6400同步DRAM
文件頁數(shù): 31/51頁
文件大?。?/td> 430K
代理商: M2V64S2DTP-6
Feb.'00
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.3.2)
64M Synchronous DRAM
M2V64S20DTP-6,-6L,-7,-7L,-8,-8L
M2V64S30DTP-6,-6L,-7,-7L,-8,-8L
M2V64S40DTP-6,-6L,-7,-7L,-8,-8L
(4-BANK x 4,194,304-WORD x 4-BIT)
(4-BANK x 2,097,152-WORD x 8-BIT)
(4-BANK x 1,048,576-WORD x 16-BIT)
31
ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
(Ta=0 ~ 70'C, unless otherwise noted)
CAPACITANCE
(Ta=0 ~ 70'C, Vdd = VddQ = 3.3 ± 0.3V, Vss = VssQ = 0V, unless otherwise noted)
Symbol
Parameter
Conditions
Ratings
Unit
Vdd
Supply Voltage
with respect to Vss
-0.5 ~ 4.6
V
VddQ
Supply Voltage for Output
with respect to VssQ
-0.5 ~ 4.6
V
VI
Input Voltage
with respect to Vss
-0.5 ~ Vdd+0.5
V
VO
Output Voltage
with respect to VssQ
-0.5 ~ VddQ+0.5
V
IO
Output Current
50
mA
Pd
Power Dissipation
Ta = 25'C
1000
mW
Topr
Operating Temperature
0 ~ 70
'C
Tstg
Storage Temperature
-65 ~ 150
'C
Symbol
Parameter
Limits
Unit
Min.
Typ.
Max.
Vdd
Supply Voltage
3.0
3.3
3.6
V
Vss
Supply Voltage
0
0
0
V
VddQ
Supply Voltage for Output
3.0
3.3
3.6
V
VssQ
Supply Voltage for Output
0
0
0
V
VIH *1
High-Level Input Voltage all inputs
2.0
Vdd+0.3
V
VIL *2
NOTES)
1. VIH(max)=5.5V AC for pulse width less than 10ns.
2. VIL(min)=-1.0V AC for pulse width less than 10ns.
Low-Level Input Voltage all inputs
-0.3
0.8
V
VI=1.4v
f=1MHz
VI=200mVrms
Unit
Test Condition
Parameter
Symbol
pF
pF
pF
pF
6.5
4.0
3.5
2.5
3.8
2.5
3.8
2.5
Max.
Min.
Input Capacitance, I/O pin
CI/O
Input Capacitance, CLK pin
CI(K)
Input Capacitance, control pin
CI(C)
Input Capacitance, address pin
CI(A)
Limits
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