參數(shù)資料
型號: M2S56D30AKT-75
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 32M X 8 DDR DRAM, 0.75 ns, PDSO64
封裝: 0.40 MM PITCH, STSOP-64
文件頁數(shù): 39/41頁
文件大?。?/td> 638K
代理商: M2S56D30AKT-75
7
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
256M Double Data Rate Synchronous DRAM
M2S56D20/ 30/ 40AKT
BASIC FUNCTIONS
The M2S56D20/30/40A provides basic functions, bank (row) activate, burst read / write, bank (row)
precharge, and auto / self refresh. Each command is defined by control signals of /RAS, /CAS and /WE at
CLK rising edge. In addition to 3 signals, /CS ,CKE and A10 are used as chip select, refresh option, and
precharge option, respectively. Refer to the command truth table for the detailed definition of commands.
/CS
Chip Select : L=select, H=deselect
/RAS
Command
/CAS
Command
/WE
Command
CKE
Refresh Option @refresh command
A10
Precharge Option @precharge or read/write command
CLK
define basic commands
/CLK
Activate (ACT) [/RAS =L, /CAS =/WE =H]
ACT command activates one row in an idle bank indicated by BA.
Read (READ) [/RAS =H, /CAS =L, /WE =H]
READ command starts burst read from the active bank indicated by BA. First output data appears after
/CAS latency. When A10 =H in this command, the bank is deactivated after the burst read (auto-
precharge, READA)
Write (WRITE) [/RAS =H, /CAS =/WE =L]
WRITE command starts burst write to the active bank indicated by BA. Total data length to be written
is defined by burst length. When A10 =H in this command, the bank is deactivated after the burst write
(auto-precharge, WRITEA)
Precharge (PRE) [/RAS =L, /CAS =H, /WE =L]
PRE command deactivates the active bank indicated by BA. This command also terminates burst read
/write operation. When A10 =H in this command, all banks are deactivated (precharge all, PREA ).
Auto-Refresh (REFA) [/RAS =/CAS =L, /WE =CKE =H]
REFA command starts auto-refresh cycle. Refresh addresses including bank address are generated
internally. After this command, the banks are precharged automatically.
相關PDF資料
PDF描述
M2V56S30ATP-6 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
M30-6000206 2 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6000406 4 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6001106 11 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
M30-6011006 20 CONTACT(S), MALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT
相關代理商/技術參數(shù)
參數(shù)描述
M2S56D30AKT-75A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30AKT-75AL 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30AKT-75L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30ATP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30ATP-10 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM