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參數(shù)資料
| 型號(hào)： | M-986-2R2PL |
| 廠商： | CLARE INC |
| 元件分類： | 信令電路 |
| 英文描述： | MFC Transceivers |
| 中文描述： | TELECOM, MF SIGNALING CIRCUIT, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 520K |
| 代理商： | M-986-2R2PL |
Part #
Description
M-986-1R2P
40-pin plastic DIP, Single Channel
M-986-1R2PL
44-pin PLCC, Single Channel
M-986-2R2P
40-pin plastic DIP, Dual Channel
M-986-2R2PL
44-pin PLCC, Dual Channel
www.clare.com
DS-M976-2R2-R3
M-986-2R2
MFC Transceivers
1
Block Diagram
Pin Assignments
Ordering Information
Features
Direct A-Law PCM digital input
2.048 Mb/s clocking
Programmable forward/backward mode
Programmable compelled/direct control
Operates with standard codecs for analog
interfacing
Microprocessor read/write interface
Binary or 2-of-6 data formats
Single- or dual-channel versions
5 volt power
Applications
Test equipment
Trunk adapters
Paging terminals
Traffic recorders
PBXs
Description
The M-986-1R2 and -2R2 MFC Transceivers contain
all the logic necessary to transmit and receive CCITT
R2F (forward) and R2B (backward) multifrequency
signals on one 40-pin integrated circuit (IC). M-986-
1R2 is a single-channel version; M-986-2R2 provides
two channels. R1 single and dual multifrequency
transceivers are also available as M-986-1R1 and -
2R1.
Operating with a 20.48 MHz crystal, the M-986 is
capable of providing a direct digital interface to an A-
law-encoded PCM digital input. Each channel can be
connected to an analog source using a coder-decoder
(codec) as shown in the Block Diagram below.
The M-986 can be configured by the customer to
operate with the transmitter and receiver either cou-
pled together or independently, allowing it to handle a
compelled cycle automatically or via command from
the host processor. For the R2 versions of the M-986,
A-law is used for coding/decoding. The M-986 is con-
figured and controlled through an integral coprocessor
port.
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