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參數(shù)資料
| 型號： | LTM9009IY-14#PBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 11/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT UMODULE 140-BGA |
| 標(biāo)準(zhǔn)包裝： | 210 |
| 系列： | µModule® |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 80M |
| 數(shù)據(jù)接口： | Serial LVDS |
| 轉(zhuǎn)換器數(shù)目： | 8 |
| 功率耗散（最大）： | 997mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 140-BFBGA |
| 供應(yīng)商設(shè)備封裝： | 140-BGA（11.25x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 8 Differential; 8 Single-Ended |
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9009101114fa
LTM9011-14/
LTM9010-14/LTM9009-14
pin FuncTions
OVDD (G9, G10): Output Driver Supply. OVDD is internally
bypassed to ground with a 0.1F ceramic capacitor.
SDOA(E6):Inserialprogrammingmode,(PAR/SER=0V),
SDOA is the optional serial interface data output for
registers controlling channels 1, 4, 5 and 8. Data on SDO
is read back from the mode control registers and can be
latched on the falling edge of SCK. SDO is an open-drain
N-channel MOSFET output that requires an external 2k
pull-up resistor from 1.8V to 3.3V. If read back from the
mode control registers is not needed, the pull-up resis-
tor is not necessary and SDO can be left unconnected. In
parallel programming mode (PAR/SER = VDD),SDOAisan
input that enables internal 100Ω termination resistors on
the digital outputs of channels 1, 4, 5 and 8. When used
as an input, SDO can be driven with 1.8V to 3.3V logic
through a 1k series resistor.
SDOB (D6): Serial Data Output Pin for Channels 2, 3, 6
and 7. See description for SDOA.
PAR/SER(A7):ProgrammingModeSelectionPin.Connect
to ground to enable the serial programming mode. CSA,
CSB, SCK, SDI, SDOA and SDOB become a serial interface
that control the A/D operating modes. Connect to VDD to
enable parallel programming mode where CSA, CSB, SCK,
SDI, SDOA and SDOB become parallel logic inputs that
control a reduced set of the A/D operating modes. PAR/
SER should be connected directly to ground or the VDD
of the part and not be driven by a logic signal.
VREF (B6): Reference Voltage Output. VREF is internally
bypassed to ground with a 1μF ceramic capacitor, nomi-
nally 1.25V.
SENSE (C5): Reference Programming Pin. Connecting
SENSE to VDD selects the internal reference and a ±1V
input range. Connecting SENSE to ground selects the
internal reference and a ±0.5V input range. An external
reference between 0.625V and 1.3V applied to SENSE
selects an input range of ±0.8 VSENSE.SENSEisinternally
bypassed to ground with a 0.1F ceramic capacitor.
LVDS Outputs
All pins in this section are differential LVDS outputs.
The output current level is programmable. There is an
optionalinternal100terminationresistorbetweenthe
pins of each LVDS output pair.
OUT1A–/OUT1A+,OUT1B–/OUT1B+(E7/E8,C8/D8):Serial
Data Outputs for Channel 1. In 1-lane output mode only
OUT1A–/OUT1A+ are used.
OUT2A–/OUT2A+,OUT2B–/OUT2B+(B8/A8,D7/C7):Serial
Data Outputs for Channel 2. In 1-lane output mode only
OUT2A–/OUT2A+ are used.
OUT3A–/OUT3A+, OUT3B–/OUT3B+ (D10/D9, E10/E9):
Serial Data Outputs for Channel 3. In 1-lane output mode
only OUT3A–/OUT3A+ are used.
OUT4A–/OUT4A+,OUT4B–/OUT4B+(C9/C10,F7/F8):Serial
Data Outputs for Channel 4. In 1-lane output mode only
OUT4A–/OUT4A+ are used.
OUT5A–/OUT5A+,OUT5B–/OUT5B+(J8/J7,K8/K7):Serial
Data Outputs for Channel 5. In 1-lane output mode only
OUT5A–/OUT5A+ are used.
OUT6A–/OUT6A+, OUT6B–/OUT6B+ (K9/K10, L9/L10):
Serial Data Outputs for Channel 6. In 1-lane output mode
only OUT6A–/OUT6A+ are used.
OUT7A–/OUT7A+,OUT7B–/OUT7B+(M7/L7,P8/N8):Serial
Data Outputs for Channel 7. In 1-lane output mode only
OUT7A–/OUT7A+ are used.
OUT8A–/OUT8A+, OUT8B–/OUT8B+ (L8/M8, M10/M9):
Serial Data Outputs for Channel 8. In 1-lane output mode
only OUT8A–/OUT8A+ are used.
FRA–/FRA+ (H7/H8): Frame Start Outputs for Channels
1, 4, 5 and 8.
FRB–/FRB+ (J9/J10): Frame Start Outputs for Channels
2, 3, 6 and 7.
DCOA–/DCOA+ (G8/G7): Data Clock Outputs for Channels
1, 4, 5 and 8.
DCOB–/DCOB+ (F10, F9): Data Clock Outputs for Chan-
nels 2, 3, 6 and 7.
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| LTM9010-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:14-Bit, 125Msps/105Msps/ 80Msps Low Power Octal ADCs |
| LTM9010CY-14 | 制造商:Linear Technology 功能描述:ADC 14BIT UMODULE 140BGA 制造商:Linear Technology 功能描述:ADC, 14BIT, UMODULE, 140BGA |
| LTM9010CY-14#PBF | 功能描述:IC ADC 14BIT UMODULE 140BGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:µModule® 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| LTM9010IY-14#PBF | 功能描述:IC ADC 14BIT UMODULE 140-BGA RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:µModule® 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個單端，單極；2 個差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| LTM9011-14 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Quad 14-Bit, 125Msps ADC with Integrated Drivers |
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