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參數(shù)資料
| 型號： | LTC4215CUFD-3 |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24 |
| 封裝： | 4 X 5 MM, PLASTIC, MO-220, QFN-24 |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 307K |
| 代理商： | LTC4215CUFD-3 |
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LTC4215-1/LTC4215-3
19
421513fc
Figure 6. Data Transfer Over I2C or SMBus
1.235V/R3 at the edge of the OV rising threshold, where
ISTRING > 40μA. Then solve the following equations:
R2 =
V
OV(OFF)
V
UV(ON)
R3
UV
TH(RISING)
OV
TH(FALLING)
– R3
R1 =
V
UV(ON) (R3 + R2)
UV
TH(RISING)
–R3 – R2
In our case we choose R3 to be 3.4k to give a resistor
string currrent below 100μA. Then solving the equations
results in R2 = 1.16k and R1 = 34.6k.
The FB divider is solved by picking R8 and solving for R7,
choosing 3.57k for R8 we get:
R7 =
V
PWRGD(UP) R8
FB
TH(RISING)
–R8
Resulting in R7 = 30k.
A 0.1μF capacitor, CF, is placed on the UV pin to prevent
supply glitches from turning off the GATE via UV or OV.
The address is set with the help of Table 1, which indicates
binary address 1001011 corresponds to address 4. Address
4 is set by setting ADR1 open and ADR0 high.
Next the value of R5 and R6 are chosen to be the default
values 10Ω and 15k as discussed previously.
In addition a 0.1μF ceramic bypass capacitor is placed on
the INTVCC pin.
Layout Considerations
To achieve accurate current sensing, a Kelvin connection
is required. The minimum trace width for 1oz copper
foil is 0.02" per amp to make sure the trace stays at a
reasonable temperature. Using 0.03" per amp or wider
is recommended. Note that 1oz copper exhibits a sheet
resistance of about 530μΩ. Small resistances add up
quickly in high current applications. To improve noise
immunity, put the resistive dividers to the UV, OV and FB
pins close to the device and keep traces to VDD and GND
short. It is also important to put the bypass capacitor for
the INTVCC pin, C3, as close as possible between INTVCC
and GND. A 0.1μF capacitor from the UV pin (and OV pin
through resistor R2) to GND also helps reject supply noise.
Figure 4 shows a layout that addresses these issues. Note
that a surge suppressor, Z1, is placed between supply and
ground using wide traces.
Digital Interface
The LTC4215-1/LTC4215-3 communicate with a bus mas-
ter using a 2-wire interface compatible with I2C Bus and
SMBus, an I2C extension for low power devices.
The LTC4215-1/LTC4215-3 are read-write slave devices
and support SMBus bus Read Byte, Write Byte, Read Word
and Write Word commands. The second word in a Read
Word command is identical to the rst word. The second
word in a Write Word command is ignored. Data formats
for these commands are shown in Figures 6 to 11.
START and STOP Conditions
When the bus is idle, both SCL and SDA are high. A bus
master signals the beginning of a transmission with a start
condition by transitioning SDA from high to low while SCL
is high, as shown in Figure 6. When the master has nished
communicating with the slave, it issues a STOP condition
by transitioning SDA from low to high while SCL is high.
The bus is then free for another transmission.
APPLICATIONS INFORMATION
SCL
SDA
START
CONDITION
STOP
CONDITION
ADDRESS
R/W
ACK
DATA
ACK
DATA
ACK
1 - 7
8
9
4215 F06
a6 - a0
b7 - b0
1 - 7
8
9
1 - 7
8
9
P
S
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