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參數(shù)資料
| 型號(hào)： | LTC4215CUFD-2#TRPBF |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24 |
| 封裝： | 4 X 5 MM, LEAD FREE, PLASTIC, MO-220, QFN-24 |
| 文件頁(yè)數(shù)： | 24/28頁(yè) |
| 文件大?。?/td> | 261K |
| 代理商： | LTC4215CUFD-2#TRPBF |
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LTC4215/LTC4215-2
5
4215fe
ELECTRICAL CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25°C. VDD = 12V unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise specied.
Note 3: An internal clamp limits the GATE pin to a minimum of 5V above
SOURCE. Driving this pin to voltages beyond the clamp may damage the device.
Note 4: Offset error is the offset voltage measured from 1LSB when the
output code ickers between 0000 0000 and 0000 0001.
Note 5: Integral nonlinearity is dened as the deviation of a code from a
precise analog input voltage. Maximum specications are limited by the
LSB step size and the single shot measurement. Typical specications are
measured from the 1/4, 1/2 and 3/4 areas of the quantization band.
Note 6: Guaranteed by design and not subject to test.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
TUE
Total Unadjusted Error
VDD – SENSE
SOURCE
ADIN
l
±5.5
±5.0
LSB
FSE
Full-Scale Error
VDD – SENSE
SOURCE
ADIN
l
±5.5
±5.0
LSB
VFS
Full-Scale Voltage (255 VLSB)VDD – SENSE
SOURCE
ADIN
l
37.625
15.14
1.205
38.45
15.44
1.23
39.275
15.74
1.255
mV
V
RADIN
ADIN Pin Sampling Resistance
VADIN = 1.28V
l
12
M
Ω
IADIN
ADIN Pin Input Current
VADIN = 1.28V
l
0
±0.1
μA
Conversion Rate
10
Hz
I2C Interface
VADR(H)
ADR0, ADR1, ADR2 Input High Voltage
l
INTVCC
–0.8
INTVCC
–0.4
INTVCC
–0.2
V
IADR(IN,Z)
ADR0, ADR1, ADR2 Hi-Z Input Current
ADR0, ADR1, ADR2 = 0.8V
ADR0, ADR1, ADR2 = INTVCC – 0.8V
l
3
–3
μA
VADR(L)
ADR0, ADR1, ADR2 Input Low Voltage
l
0.2
0.4
0.8
V
IADR(IN)
ADR0, ADR1, ADR2 Input Current
ADR0, ADR1, ADR2 = 0V, INTVCC
l
–80
80
μA
IALERT
ALERT Input Current
ALERT = 6.5V
l
±1
μA
VALERT(OL)
ALERT Output Low Voltage
IALERT = 3mA
l
0.2
0.4
V
VSDA,SCL(TH)
SDA, SCL Input Threshold
l
1.3
1.7
1.9
V
ISDA,SCL(OH)
SDA, SCL Input Current
SCL, SDA = 6.5V
l
±1
μA
VSDA(OL)
SDA Output Low Voltage
ISDA = 3mA
l
0.2
0.4
V
I2C Interface Timing
fSCL(MAX)
SCL Clock Frequency
Operates with fSCL ≤ fSCL(MAX)
l
400
1000
kHz
tBUF(MIN)
Bus Free Time Between Stop/Start Condition
l
0.12
1.3
μs
tHD,STA(MIN)
Hold Time After (Repeated) Start Condition
l
30
600
ns
tSU,STA(MIN)
Repeated Start Condition Set-Up Time
l
30
600
ns
tSU,STO(MIN)
Stop Condition Set-Up Time
l
140
600
ns
tHD,DAT(MIN)
Data Hold Time (Input)
l
30
100
ns
tHD,DATO
Data Hold Time (Output)
l
300
500
900
ns
tSU,DAT(MIN)
Data Set-Up Time
l
30
600
ns
tSP
Suppressed Spike Pulse Width
l
50
110
250
ns
CX
SCL, SDA Input Capacitance
SDAI Tied to SDAO (Note 6)
l
10
pF
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| LTC4215CUFD-3 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC24 |
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