- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄179917 > LTC2627CDE#TR (LINEAR TECHNOLOGY CORP) 12-Bit Dual Rail-to-Rail with I2C Interface; Package: DFN; No of Pins: 12; Temperature Range: 0°C to +70°C PDF資料下載
參數(shù)資料
| 型號： | LTC2627CDE#TR |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | DAC |
| 英文描述： | 12-Bit Dual Rail-to-Rail with I2C Interface; Package: DFN; No of Pins: 12; Temperature Range: 0°C to +70°C |
| 中文描述： | SERIAL INPUT LOADING, 7 us SETTLING TIME, 12-BIT DAC, PDSO12 |
| 封裝： | 4 X 3 MM, EXPOSED PAD, PLASTIC, MO-229WGED, DFN-12 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 333K |
| 代理商： | LTC2627CDE#TR |
13
LTC2607/LTC2617/LTC2627
26071727f
The value of these pull-up resistors is dependent on the
power supply and can be obtained from the I2C specifica-
tions. For an I2C bus operating in the fast mode, an active
pull-up will be necessary if the bus capacitance is greater
than 200pF.
The LTC2607/LTC2617/LTC2627 are receive-only (slave)
devices. The master can write to the LTC2607/LTC2617/
LTC2627. The LTC2607/LTC2617/LTC2627 do not re-
spond to a read from the master.
The START (S) and STOP (P) Conditions
When the bus is not in use, both SCL and SDA must be
high. A bus master signals the beginning of a communica-
tion to a slave device by transmitting a START condition.
A START condition is generated by transitioning SDA from
high to low while SCL is high.
When the master has finished communicating with the
slave, it issues a STOP condition. A STOP condition is
generated by transitioning SDA from low to high while SCL
is high. The bus is then free for communication with
another I2C device.
Acknowledge
The Acknowledge signal is used for handshaking between
the master and the slave. An Acknowledge (active LOW)
generated by the slave lets the master know that the latest
byte of information was received. The Acknowledge re-
lated clock pulse is generated by the master. The master
releases the SDA line (HIGH) during the Acknowledge
clock pulse. The slave-receiver must pull down the SDA
bus line during the Acknowledge clock pulse so that it
remains a stable LOW during the HIGH period of this clock
pulse. The LTC2607/LTC2617/LTC2627 respond to a
write by a master in this manner. The LTC2607/LTC2617/
LTC2627 do not acknowledge a read (retains SDA HIGH
during the period of the Acknowledge clock pulse).
Chip Address
The state of CA0, CA1 and CA2 decides the slave address
of the part. The pins CA0, CA1 and CA2 can be each set to
any one of three states: VCC, GND or float. This results in
OPERATIO
U
Power-On Reset
The LTC2607/LTC2617/LTC2627 clear the outputs to
zero scale when power is first applied, making system
initialization consistent and repeatable. The LTC2607-1/
LTC2617-1/LTC2627-1 set the voltage outputs to midscale
when power is first applied.
For some applications, downstream circuits are active
during DAC power-up, and may be sensitive to nonzero
outputs from the DAC during this time. The LTC2607/
LTC2617/LTC2627 contain circuitry to reduce the power-
on glitch; furthermore, the glitch amplitude can be made
arbitrarily small by reducing the ramp rate of the power
supply. For example, if the power supply is ramped to 5V
in 1ms, the analog outputs rise less than 10mV above
ground (typ) during power-on. See Power-On Reset Glitch
in the Typical Performance Characteristics section.
Power Supply Sequencing
The voltage at REF (Pin 9) should be kept within the range
– 0.3V
≤ VREF ≤ VCC + 0.3V (see Absolute Maximum
Ratings). Particular care should be taken to observe these
limits during power supply turn-on and turn-off sequences,
when the voltage at VCC (Pin 8) is in transition.
Transfer Function
The digital-to-analog transfer function is:
V
k
VV
V
OUT IDEAL
N
REF
REFLO
() =
()+
2
where k is the decimal equivalent of the binary DAC input
code, N is the resolution and VREF is the voltage at
REF (Pin 6).
Serial Digital Interface
The LTC2607/LTC2617/LTC2627 communicate with a host
using the standard 2-wire I2C interface. The Timing Dia-
grams (Figures 1 and 2) show the timing relationship of
the signals on the bus. The two bus lines, SDA and SCL,
must be high when the bus is not in use. External pull-up
resistors or current sources are required on these lines.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LTC2627CDE-1#TR | 12-Bit Dual Rail-to-Rail with I2C Interface; Package: DFN; No of Pins: 12; Temperature Range: 0°C to +70°C |
| LTC2627IDE#TR | 12-Bit Dual Rail-to-Rail with I2C Interface; Package: DFN; No of Pins: 12; Temperature Range: -40°C to +85°C |
| LTC2627IDE-1#TR | 12-Bit Dual Rail-to-Rail with I2C Interface; Package: DFN; No of Pins: 12; Temperature Range: -40°C to +85°C |
| LTC2629CGN#TR | Quad 12-Bit Rail-to-Rail DACs with I2C Interface; Package: SSOP; No of Pins: 16; Temperature Range: 0°C to +70°C |
| LTC2629CGN-1#TR | Quad 12-Bit Rail-to-Rail DACs with I2C Interface; Package: SSOP; No of Pins: 16; Temperature Range: 0°C to +70°C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2627IDE | 制造商:Linear Technology 功能描述:DAC 2-CH 12-bit 12-Pin DFN EP 制造商:LINEAR_TECH 功能描述: |
| LTC2627IDE#PBF | 功能描述:IC DAC 12BIT R-R I2C 12-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| LTC2627IDE#TRPBF | 功能描述:IC DAC 12BIT R-R I2C 12-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
| LTC2627IDE-1#PBF | 功能描述:IC DAC 12BIT R-R I2C 12-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| LTC2627IDE-1#TRPBF | 功能描述:IC DAC 12BIT R-R I2C 12-DFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。