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參數(shù)資料
| 型號： | LTC2453CDDBTRMPBF |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Easy-to-Use, Ultra-Tiny, Differential, 16-Bit ADC With I2C Interface |
| 中文描述： | 易于使用，超微型，差分，16位ADC，帶有I2C接口 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大小： | 223K |
| 代理商： | LTC2453CDDBTRMPBF |
LTC2453
12
2453f
2) The bandwidth from V
SIG
is reduced at the input pins
(IN
+
, IN
–
). This bandwidth reduction isolates the ADC
from high frequency signals, and as such provides
simple antialiasing and input noise reduction.
3) Switching transients generated by the ADC are attenu-
ated before they go back to the signal source.
4) A large C
IN
gives a better AC ground at the input pins,
helping reduce reflections back to the signal source.
5) Increasing R
S
protects the ADC by limiting the current
during an outside-the-rails fault condition.
There is a limit to how large R
S
C
IN
should be for a given
application. Increasing R
S
beyond a given point increases
the voltage drop across R
S
due to the input current,
to the point that significant measurement errors exist.
Additionally, for some applications, increasing the R
S
C
IN
product too much may unacceptably attenuate the signal
at frequencies of interest.
For most applications, it is desirable to implement C
IN
as
a high-quality 0.1
μ
F ceramic capacitor and R
S
≤ 1k. This
capacitor should be located as close as possible to the
actual V
IN
package pin. Furthermore, the area encompassed
by this circuit path, as well as the path length, should be
minimized.
In the case of a 2-wire sensor that is not remotely
grounded, it is desirable to split R
S
and place series
resistors in the ADC input line as well as in the sensor
Figure 10. Measured INL vs Input Voltage,
C
IN
= 0.1μF, V
CC
= 5V, T
A
= 25°C
ground return line, which should be tied to the ADC GND
pin using a star connection topology.
Figure 10 shows the measured LTC2453 INL vs Input
Voltage as a function of R
S
value with an input capacitor
C
IN
= 0.1μF.
In some cases, R
S
can be increased above these guidelines.
The input current is zero when the ADC is either in sleep
or I/O modes. Thus, if the time constant of the input RC
circuit
τ
= R
S
C
IN
, is of the same order of magnitude or
longer than the time periods between actual conversions,
then one can consider the input current to be reduced
correspondingly.
These considerations need to be balanced out by the input
signal bandwidth. The 3dB bandwidth ≈ 1/(2
π
R
S
C
IN
).
Finally, if the recommended choice for C
IN
is unacceptable
for the user’s specific application, an alternate strategy is to
eliminate C
IN
and minimize C
PAR
and R
S
. In practical terms,
this configuration corresponds to a low impedance sensor
directly connected to the ADC through minimum length
traces. Actual applications include current measurements
through low value sense resistors, temperature measure-
ments, low impedance voltage source monitoring, and so
on. The resultant INL vs V
IN
is shown in Figure 11. The
measurements of Figure 11 include a capacitor C
PAR
cor-
responding to a minimum sized layout pad and a minimum
width input trace of about 1 inch length.
Figure 11. Measured INL vs Input Voltage,
C
IN
= 0, V
CC
= 5V, T
A
= 25°C
APPLICATIONS INFORMATION
DIFFERENTIAL INPUT VOLTAGE (V)
–5
I
2
6
10
3
2453 F10
–2
–6
0
4
8
–4
–8
–10
–3
–4
–1
–2
1
2
4
0
5
R
S
= 10k
R
S
= 2k
R
S
= 1k
R
S
= 0
C
IN
= 0.1
μ
F
V
CC
= 5V
T
A
= 25
°
C
DIFFERENTIAL INPUT VOLTAGE (V)
–5
I
2
6
10
3
2453 F11
–2
–6
0
4
8
–4
–8
–10
–3
–4
–1
–2
1
2
4
0
5
R
S
= 10k
R
S
= 1k, 2k
R
S
= 0
C
IN
= 0
V
CC
= 5V
T
A
= 25
°
C
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