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參數(shù)資料
| 型號： | LTC2453CDDBTRMPBF |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Easy-to-Use, Ultra-Tiny, Differential, 16-Bit ADC With I2C Interface |
| 中文描述： | 易于使用，超微型，差分，16位ADC，帶有I2C接口 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 223K |
| 代理商： | LTC2453CDDBTRMPBF |
LTC2453
10
2453f
Discarding a Conversion Result and Initiating a New
Conversion
It is possible to start a new conversion without reading
the old result, as shown in Figure 7. Following a valid 7-bit
address, a read request (R) bit, and a valid ACK, a STOP
command will start a new conversion.
PRESERVING THE CONVERTER ACCURACY
The LTC2453 is designed to dramatically reduce the conver-
sion result’s sensitivity to device decoupling, PCB layout,
antialiasing circuits, line and frequency perturbations. Nev-
ertheless, in order to preserve the high accuracy capability
of this part, some simple precautions are desirable.
Digital Signal Levels
Due to the nature of CMOS logic, it is advisable to keep
input digital signals near GND or V
CC
. Voltages in the
range of 0.5V to V
CC
– 0.5V may result in additional cur-
rent leakage from the part.
Driving V
CC
and GND
In relation to the V
CC
and GND pins, the LTC2453 combines
internal high frequency decoupling with damping elements,
which reduce the ADC performance sensitivity to PCB
layout and external components. Nevertheless, the very
high accuracy of this converter is best preserved by careful
low and high frequency power supply decoupling.
A 0.1μF, high quality, ceramic capacitor in parallel with a
10μF ceramic capacitor should be connected between the
V
CC
and GND pins, as close as possible to the package.
The 0.1μF capacitor should be placed closest to the ADC
package. It is also desirable to avoid any via in the circuit
path, starting from the converter V
CC
pin, passing through
these two decoupling capacitors, and returning to the
converter GND pin. The area encompassed by this circuit
path, as well as the path length, should be minimized.
Very low impedance ground and power planes, and star
connections at both V
CC
and GND pins, are preferable.
The V
CC
pin should have three distinct connections: the
SLEEP
7-BIT ADDRESS
(0010100)
S
P
R
ACK
READ
DATA OUTPUT
CONVERSION
CONVERSION
2453 F05
Figure 5. The LTC2453 Coversion Sequence
SLEEP
SLEEP
S
P
R
ACK
READ
READ
DATA OUTPUT
CONVERSION
CONVERSION
2453 F06
S
R
P
ACK
CONVERSION
DATA OUTPUT
7-BIT ADDRESS
(0010100)
7-BIT ADDRESS
(0010100)
Figure 6. Consecutive Reading at the Same Configuration
Figure 7. Start a New Conversion without Reading Old Conversion Result
SLEEP
S
P
R
ACK READ (OPTIONAL)
DATA OUTPUT
CONVERSION
CONVERSION
2453 F07
7-BIT ADDRESS
(0010100)
APPLICATIONS INFORMATION
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