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參數(shù)資料
| 型號： | LTC2262CUJ-14#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 4/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 150MSPS 40-QFN |
| 標準包裝： | 2,000 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 150M |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 171mW |
| 電壓電源： | 單電源 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-QFN（6x6） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分 |
| 配用： | DC890B-ND - BOARD USB DATA COLLECTION |
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LTC2262-14
12
226214fc
For more information www.linear.com/LTC2262-14
PIN FUNCTIONS
SDI (Pin 15): In serial programming mode, (PAR/SER =
0V), SDI is the serial interface data input. Data on SDI is
clocked into the mode control registers on the rising edge
of SCK. In the parallel programming mode (PAR/SER =
VDD), SDI can be used to power down the part. When SDI
is low, the part operates normally. When SDI is high, the
part enters sleep mode. SDI can be driven with 1.8V to
3.3V logic.
SDO (Pin 16): In serial programming mode, (PAR/SER
= 0V), SDO is the optional serial interface data output.
Data on SDO is read back from the mode control registers
and can be latched on the falling edge of SCK. SDO is an
open-drain NMOS output that requires an external 2k
pull-up resistor to 1.8V-3.3V. If read back from the mode
control registers is not needed, the pull-up resistor is not
necessaryandSDOcanbeleftunconnected.Intheparallel
programming mode (PAR/SER = VDD), SDO is not used
and should not be connected.
OGND (Pin 25): Output Driver Ground.
OVDD (Pin 26): Output Driver Supply. Bypass to ground
with a 0.1F ceramic capacitor.
VCM (Pin 37): Common Mode Bias Output, Nominally
Equal to VDD/2. VCM should be used to bias the common
mode of the analog inputs. Bypass to ground with a 0.1F
ceramic capacitor.
VREF(Pin38):ReferenceVoltageOutput.Bypasstoground
with a 1F ceramic capacitor, nominally 1.25V.
SENSE(Pin39):ReferenceProgrammingPin.Connecting
SENSEtoVDDselectstheinternalreferenceanda±1Vinput
range. Connecting SENSE to ground selects the internal
reference and a ±0.5V input range. An external reference
between 0.625V and 1.3V applied to SENSE selects an
input range of ±0.8 VSENSE.
FULL-RATE CMOS OUTPUT MODE
All Pins Below Have CMOS Output Levels (OGND to
OVDD)
D0 to D13 (Pins 17-24, 29-34): Digital Outputs. D13 is
the MSB.
CLKOUT– (Pin 27): Inverted version of CLKOUT+.
CLKOUT+ (Pin 28): Data Output Clock. The digital outputs
normally transition at the same time as the falling edge
of CLKOUT+. The phase of CLKOUT+ can also be delayed
relative to the digital outputs by programming the mode
control registers.
DNC (Pin 35): Do not connect this pin.
OF (Pin 36): Over/Under Flow Digital Output. OF is high
when an overflow or underflow has occurred.
DOUBLE DATA RATE CMOS OUTPUT MODE
All Pins Below Have CMOS Output Levels (OGND to
OVDD)
D0_1 to D12_13 (Pins 18, 20, 22, 24, 30, 32, 34): Double
DataRateDigitalOutputs.Twodatabitsaremultiplexedonto
eachoutputpin.Theevendatabits(D0,D2,D4,D6,D8,D10,
D12) appear when CLKOUT+ is low. The odd data bits (D1,
D3, D5, D7, D9, D11, D13) appear when CLKOUT+ is high.
CLKOUT– (Pin 27): Inverted version of CLKOUT+.
CLKOUT+ (Pin 28): Data Output Clock. The digital outputs
normally transition at the same time as the falling and ris-
ing edges of CLKOUT+. The phase of CLKOUT+ can also
be delayed relative to the digital outputs by programming
the mode control registers.
DNC (Pins 17, 19, 21, 23, 29, 31, 33, 35): Do not con-
nect these pins.
OF (Pin 36): Over/Under Flow Digital Output. OF is high
when an overflow or underflow has occurred.
DOUBLE DATA RATE LVDS OUTPUT MODE
All Pins Below Have LVDS Output Levels. The Output
Current Level is Programmable. There is an Optional
Internal 100 Termination Resistor Between the Pins
of Each LVDS Output Pair.
D0_1–/D0_1+ to D12_13–/D12_13+ (Pins 17/18, 19/20,
21/22, 23/24, 29/30, 31/32, 33/34): Double Data Rate
Digital Outputs. Two data bits are multiplexed onto each
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| LTC2262IUJ-12#PBF | 功能描述:IC ADC 12BIT 150MSPS 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2262IUJ-12#TRPBF | 功能描述:IC ADC 12BIT 150MSPS 40-QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| LTC2262IUJ-14#PBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 150Msps 14-bit Parallel/LVDS 40-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 14BIT 1.8V 150MSPS 40-QFN |
| LTC2262IUJ-14#TRPBF | 制造商:Linear Technology 功能描述:ADC Single Pipelined 150Msps 14-bit Parallel/LVDS 40-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 14BIT 150MSPS 40-QFN |
| LTC2263-12 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:12-Bit, 65Msps/40Msps/25Msps Low Power Dual ADCs |
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