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參數(shù)資料
| 型號(hào)： | LTC1402 |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Serial 12-Bit, 2.2Msps Sampling ADC with Shutdown(串行12位，2.2Msps 采樣模數(shù)轉(zhuǎn)換器(帶關(guān)斷)) |
| 中文描述： | 串行12位，2.2Msps采樣ADC（串行12位，2.2Msps采樣模數(shù)轉(zhuǎn)換器（帶關(guān)斷）與關(guān)斷） |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 280K |
| 代理商： | LTC1402 |
8
LTC1402
GAIN (Pin 7):
Tie to AGND2 to set the reference voltage to
4.096V or tie to V
REF
to set the reference voltage to 2.048V.
(Note 4)
BIP/UNI (Pin 8):
Tie to logic low to set the input range to
unipolar mode or tie to logic high to set the input range to
bipolar mode. (Note 4)
OGND (Pin 9):
Output Ground for the Output Driver. This
pin can be tied to the digital ground of the system. All other
ground pins should be tied to the analog ground plane.
D
OUT
(Pin 10):
Three-State Data Output. (Note 3) Each
output data word represents the analog input at the start
of the previous conversion.
OV
DD
(Pin 11):
Output Data Driver Power. Tie to V
DD
when
driving 5V logic. Tie to 3V when driving 3V logic.
DV
DD
(Pin 12):
Digital Power for Internal Logic. Bypass to
DGND with 10
μ
F ceramic (or 10
μ
F tantalum in parallel with
0.1
μ
F ceramic).
PI
FU
CTIO
N
S
U
U
DGND (Pin 13):
Digital Ground for Internal Logic. Tie to
solid analog ground plane.
V
SS
(Pin 14):
Negative Supply Voltage. Bypass to solid
analog ground plane with 10
μ
F ceramic (or 10
μ
F tantalum
in parallel with 0.1
μ
F ceramic) or tie directly to the solid
analog ground plane for single supply use. Must be set
more negative than either A
IN+
or A
IN –
. Set to 0V or –5V.
SCK (Pin 15):
External Clock. Advances the conversion
process and sequences the output data at D
OUT
on the
rising edge. Responds to 5V or 3V CMOS and to TTL levels.
(Note 4). One or more pulses wake from Nap or Sleep.
CONV (Pin 16):
Holds the input analog signal and starts
the conversion on the rising edge. Responds to 5V or 3V
CMOS and to TTL levels. (Note 4). Two pulses with SCK in
fixed high or fixed low state start Nap Mode. Four pulses
with SCK in fixed high or fixed low state start Sleep mode.
BLOCK DIAGRA
12-BIT CAPACITIVE DAC
COMP
REF AMP
–
+
2.048V REF
64k
GAIN
C
SAMPLE
C
SAMPLE
CONTROL LOGIC
SCK
CONV
16
15
INTERNAL
CLOCK
OUTPUT
DRIVER
ZEROING SWITCHES
AV
DD
DV
DD
V
SS
1
12
14
8
10
11
9
BIP/UNI
OV
DD
OGND
D
OUT
A
IN+
3
4
7
5
6
2
13
A
IN–
AGND1
AGND2
V
REF
DGND
1402 BD
+
–
SUCCESSIVE APPROXIMATION
REGISTER
64k
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| LTC1402CGN#PBF | 功能描述:IC ADC 12BIT 2.2MSPS SHDN 16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個(gè)單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| LTC1402CGN#TR | 功能描述:IC ADC 12BIT 2.2MSPS SHDN 16SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率（每秒）:45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端，單極 |
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| LTC1402CGNPBF | 制造商:Linear Technology 功能描述:ADC,LTC1402 12bit 2.2MSPS SPI SSOP |
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