參數(shù)資料
型號(hào): LTC1402
廠商: Linear Technology Corporation
英文描述: Serial 12-Bit, 2.2Msps Sampling ADC with Shutdown(串行12位,2.2Msps 采樣模數(shù)轉(zhuǎn)換器(帶關(guān)斷))
中文描述: 串行12位,2.2Msps采樣ADC(串行12位,2.2Msps采樣模數(shù)轉(zhuǎn)換器(帶關(guān)斷)與關(guān)斷)
文件頁(yè)數(shù): 17/24頁(yè)
文件大?。?/td> 280K
代理商: LTC1402
17
LTC1402
APPLICATIO
S I
N
FOR
ATIO
U
edge of CONV. Please note the delay specification from
SCK to a valid D
OUT
. D
OUT
is always guaranteed to be valid
by the next rising edge of SCK.
W
U
DIGITAL JITTER AT CONV (PIN 16)
In high speed applications, where high amplitude sinewaves
above 100kHz are sampled, the CONV signal must have as
little jitter as possible (10ps or less). The square wave
output of a common crystal clock module usually meets
this requirement easily. The challenge is to generate a CONV
signal from this crystal clock without jitter corruption from
other digital circuits in the system. A clock divider and any
gates in the signal path from the crystal clock to the CONV
input should not share the same integrated circuit with
other parts of the system. As shown in the interface circuit
examples, the LTC1402’s SCK and CONV inputs should be
driven first with digital buffers used to drive the serial port
interface. Also note that the master clock in the DSP may
already be corrupted with jitter, even if it comes directly
from the DSP crystal. Another problem with high speed
processor clocks is that they often use a low cost, low
speed crystal (i.e., 10MHz) to generated a fast, but jittery,
phase locked loop system clock (i.e., 40MHz). The jitter, in
these PLL-generated high speed clocks, can be several
nanoseconds. Note that if you choose to use the frame
sync signal generated by the DSP port, this signal will have
the same jitter of the DSP’s master clock.
SERIAL TO PARALLEL CONVERSION
You can take advantage of the serial interface of the LTC1402
in a parallel data system to minimize bus wiring conges-
tion in the PC board layout. Figure 13 shows an example
of this interface. It is best to send the SCK and CONV
signals to the LTC1402, and then bus them together across
the board to avoid excessive time skew among the three
signals. It is usually not necessary to buffer D
OUT
, if the PC
track is not too long. Buffering SCK and CONV prevents
jitter from corrupting these signals. The relative phase
between SCK and CONV affects the position of the parallel
word at the output of the 74HC595. The position of the
output word in Figure 13 assumes 16 clocks between each
CONV rising edge, and the CONV pulse is one clock wide.
Figure 13. Serial to Parallel Interface
SRCLR
QA
QB
QC
QD
QE
QF
QG
QH
QH
RCK
SRCK
74HC595
SER
G
15
1
2
3
4
5
6
7
9
12
10
10
11
14
13
SRCLR
QA
QB
QC
QD
QE
QF
QG
QH
QH
RCK
74ACT04
SRCK
74HC595
SER
G
11
5V
16
15
10
9
3-WIRE SERIAL
INTERFACE LINK
15
1
2
3
4
5
6
7
9
12
11
14
13
1402 F13
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
REFRDY
OV
DD
CONV
SCK
LTC1402
D
OUT
OGND
CONV
CLK
相關(guān)PDF資料
PDF描述
LTC1404 Complete SO-8, 12-Bit, 600ksps ADC with Shutdown(SO-8封裝,12位,600ksps,模數(shù)轉(zhuǎn)換器(帶關(guān)斷))
LTC1405 12-Bit, 5Msps, Sampling ADC(12位, 5Msps,采樣模數(shù)轉(zhuǎn)換器)
LTC1406 Low Power, 8-Bit, 20Msps, Sampling A/D Converter(低功耗,12位, 20Msps,采樣模數(shù)轉(zhuǎn)換器)
LTC1409 12-Bit, 800ksps Sampling A/D Converter with Shutdown(12位, 800ksps,采樣模數(shù)轉(zhuǎn)換器(帶關(guān)斷))
LTC1412 12-Bit, 3Msps, Sampling A/D Converter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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LTC1402CGN#TR 功能描述:IC ADC 12BIT 2.2MSPS SHDN 16SSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率(每秒):45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散(最大):315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC(0.295",7.50mm 寬) 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端,單極
LTC1402CGN#TRPBF 功能描述:IC ADC 12BIT 2.2MSPS SHDN 16SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率(每秒):45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散(最大):315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC(0.295",7.50mm 寬) 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端,單極
LTC1402CGNPBF 制造商:Linear Technology 功能描述:ADC,LTC1402 12bit 2.2MSPS SPI SSOP