參數(shù)資料
型號(hào)： LPC11U24FHI33/301,
廠商： NXP Semiconductors
文件頁數(shù)： 6/74頁
文件大?。?/td> 0K
描述： MCU USB 33HVQFN
產(chǎn)品培訓(xùn)模塊： Code Density for LPC11xx
標(biāo)準(zhǔn)包裝： 490
系列： LPC11Uxx
核心處理器： ARM? Cortex?-M0
芯體尺寸： 32-位
速度： 50MHz
連通性： I²C，Microwire，SPI，SSI，SSP，UART/USART，USB
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，WDT
輸入/輸出數(shù)： 26
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大小： 2K x 8
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 32-VFQFN 裸露焊盤
包裝： 托盤
其它名稱： 568-8523
LPC11U24FHI33/301,-ND
LPC11U2X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
14 of 74
NXP Semiconductors
LPC11U2x
32-bit ARM Cortex-M0 microcontroller
[1]
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled;
F = floating; If the pins are not used, tie floating pins to ground or power to minimize power consumption.
[2]
5 V tolerant pad. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up
from Deep power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode. See Figure 32 for the
reset pad configuration.
[3]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 31).
[4]
I2C-bus pin compliant with the I2C-bus specification for I2C standard mode, I2C Fast-mode, and I2C Fast-mode Plus. The pin requires an
external pull-up to provide output functionality. When power is switched off, this pin is floating and does not disturb the I2C lines.
Open-drain configuration applies to all functions on this pin.
[5]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis (see Figure 31);
includes high-current output driver.
[6]
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant (see Figure 31); includes digital
input glitch filter.
[7]
Pad provides USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and Low-speed mode
only). This pad is not 5 V tolerant.
[8]
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). Leave XTALOUT floating.
7.
Functional description
7.1 On-chip flash programming memory
The LPC11U2x contain 24 kB or 32 kB on-chip flash program memory. The flash can be
programmed using In-System Programming (ISP) or In-Application Programming (IAP)
via the on-chip boot loader software.
7.2 EEPROM
The LPC11U2x contain 1 kB, 2 kB, or 4 kB of on-chip byte-erasable and
byte-programmable EEPROM data memory. The EEPROM can be programmed using
In-Application Programming (IAP) via the on-chip boot loader software.
PIO1_31
-
25
-
I; PU
I/O
PIO1_31 — General purpose digital input/output pin.
USB_DM
13
G5
19
25
F-
USB_DM — USB bidirectional D
line.
USB_DP
14
H5
20
26
F-
USB_DP — USB bidirectional D+ line.
XTALIN
4
D1
6
8
-
Input to the oscillator circuit and internal clock
generator circuits. Input voltage must not exceed
1.8 V.
XTALOUT
5
E1
7
9
-
Output from the oscillator amplifier.
VDD
6;
29
B4;
E2
8;
44
10;
33;
48;
58
-
Supply voltage to the internal regulator, the external
rail, and the ADC. Also used as the ADC reference
voltage.
VSS
33
B5;
D2
5;
41
7;
54
-
Ground.
Table 3.
Pin description
Symbol
Pin
HVQFN33
Pi
n
TF
BGA
48
Pi
n
LQ
FP4
8
Pi
n
LQ
FP6
4
Reset
state
[1]
Type
Description
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