參數(shù)資料
型號: LPC11U14FBD48/201,
廠商: NXP Semiconductors
文件頁數(shù): 65/72頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 32K 48LQFP
產(chǎn)品培訓(xùn)模塊: Code Density for LPC11xx
標(biāo)準(zhǔn)包裝: 250
系列: LPC11Uxx
核心處理器: ARM? Cortex?-M0
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,Microwire,智能卡,SPI,SSP,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 6K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤
其它名稱: 568-8579
LPC11U1X
All information provided in this document is subject to legal disclaimers.
NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
68 of 72
NXP Semiconductors
LPC11U1x
32-bit ARM Cortex-M0 microcontroller
16. Revision history
Table 21.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
LPC11U1X v.2.2
20140311
Product data sheet
-
LPC11U1X v.2.1
Modifications:
Open-drain I2C-bus and RESET pin descriptions updated for clarity. See Table 3.
LPC11U1X v.2.1
20130924
Product data sheet
-
LPC11U1X v.2
Modifications:
Number of CT16B0 match outputs corrected in Figure 1.
Table 3:
Added Table note 2 “5 V tolerant pad” to RESET/PIO0_0.
Added Table note 4 “For parts with bootloader version 7.0...” .
Table 8: Removed BOD interrupt level 0.
Added Section 11.6 “ADC effective input impedance”.
Programmable glitch filter is enabled by default. See Section 7.6.1.
Table 6 “Static characteristics” added Pin capacitance section.
Updated Section 11.1 “Suggested USB interface solutions”.
Table 5 “Limiting values”:
Updated VDD min and max.
Updated VI conditions.
Changed title of Figure 28 from “USB interface on a self-powered device” to “USB interface
with soft-connect”.
Section 10.7 “USB interface” added. Parameter tEOPR1 and tEOPR2 renamed to tEOPR.
LPC11U1X v.2
20120111
Product data sheet
-
LPC11U1X v.1
Modifications:
Number of physical and logical endpoints corrected in Section 7.8.1.
Use of JTAG updated in Section 2 (for BSDL only).
Sampling frequency corrected in Table note 7 of Table 7.
Conditions for parameter Tstg updated in Table 5.
Part LPC11U14FHI33/201 added.
Editorial updates.
ROM-based integer division routines added (Section 2).
Use of USB with power profiles specified (Section 7.8).
Power consumption data added in Section 9.2.
SSP dynamic characteristics added (Table 16).
IRC dynamic characteristics added (Table 12).
Data sheet status changed to Product data sheet.
Section 13 added.
Description of pin PIO0_3 updated in Table 3: this pin is not used by the boot loader.
LPC11U1X v.1
20110411
Objective data sheet
-
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