參數(shù)資料
型號: LP55281TLX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 顯示驅(qū)動器
英文描述: Quad RGB Driver
中文描述: LED DISPLAY DRIVER, PBGA36
封裝: 3 X 3 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, MICRO SMD-36
文件頁數(shù): 19/28頁
文件大?。?/td> 1313K
代理商: LP55281TLX
Control Interface
The LP55281 supports two different interface modes:
SPI interface (4 wire, serial)
I
2
C compatible (2 wire, serial)
User can define the serial interface by IF_SEL pin. If IF_SEL
= 0, I
2
C mode is selected.
SPI INTERFACE
LP55281 is compatible with SPI serial bus specification and
it operates as a slave. The transmission consists of 16-bit
Write and Read Cycles. One cycle consists of a 7 Address
bits, 1 Read/Write (RW) bit and 8 Data bits. RW bit high state
defines a Write Cycle and low a Read Cycle. SO output is
normally in high-impedance state and it is active only when
Data is sent out during a Read Cycle. A pull-up resistor may
be needed in SO line if a floating logic signal can cause un-
intended current consumption in the input circuits where SO
is connected. The Address and Data are transmitted MSB
first. The Slave Select signal (SS) must be low during the Cy-
cle transmission. SS resets the interface when high and it has
to be taken high between successive Cycles. Data is clocked
in on the rising edge of the clock signal (SCK), while data is
clocked out on the falling edge of SCK.
20201123
SPI Write Cycle
20201124
SPI Read Cycle
20201125
SPI Timing Diagram
19
www.national.com
L
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