參數(shù)資料
型號： LM98555CCMH
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 時鐘及定時
英文描述： CCD Driver
中文描述： 98555 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO64
封裝： EXPOSED PAD, TSSOP-64
文件頁數(shù)： 5/9頁
文件大?。?/td> 691K
代理商： LM98555CCMH
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Package Power Rating at 25C
(Note 2)
Voltage on Any Input or Output Pin
DC Input Current at Any Pin
DC Package Input Current
Storage Temperature
Lead temperature (Soldering, 10
sec.)
ESD Susceptibility
Human Body Model
Machine Model
0.5V to 6.2V
2.0 Watts
0.5V to V
DD
+0.5V
25 mA
50 mA
65C to +150C
300C
2000V
200V
Operating Conditions
Supply Voltage
V
DDI
Supply Voltage
V
DDO
Ambient Temperature (T
A
)
Operating Frequency
Power Dissipation (Note 3)
+3.0V to +5.5V
+4.5V to +5.8V
0 to 70C
30 MHz
2.0W
Package Thermal Resistances
Package
64-Lead Exposed Pad TSSOP 36.8C / W 6.2C / W
θ
J-A
(Note 4)
θ
J-PAD
(Thermal Pad)
DC Electrical Characteristics
The following specifications apply for GND = 0V, V
DDI
= 3.3V, V
DDO
= 5.0V, unless noted otherwise.
Boldface limits apply for
T
A
= T
MIN
to T
MAX
;
all other limits T
A
= 25C
Symbol
Parameter
Conditions
I
I
Logic 1 Input Current
V
I
= V
DDI
Logic 0 Input Current
V
I
= GND
I
V
IT
Input Threshold
V
DDI
= 3.3V
Input Threshold
V
DDI
= 5.0V
Input Threshold Hysteresis
V
DDI
= 3.3V
V
IT
Input Threshold Variation
Between P1A, P2A inputs
R
O
Output Impedance P1A and
P2A Outputs
R
O
= (V
DDO
- V
O
)/I
OH
or
R
O
= V
O
/I
OL
R
O
Output Impedance All Other
Outputs
R
O
= (V
DDO
- V
O
)/I
OH
or
R
O
= V
O
/I
OL
Min
-1
-1
1.41
Typical
0.004
0.006
1.57
2.48
11
Max
1
1
1.75
Units
μA
μA
V
V
mV
mV
-72
-100
100
100
I
LOAD
= 525 mA
6.1
9.9
I
LOAD
= 280 mA
10.2
17.4
AC Electrical Characteristics
The following specifications apply for GND = 0V, V
DDI
= 3.3V, V
DDO
= 5.0V, unless noted otherwise.
Boldface limits apply for
T
A
= T
MIN
to T
MAX
;
all other limits T
A
= 25C
Symbol
Parameter
Conditions
t
PHL
Prop Delay: High-to-Low
P1A and P2A Outputs
(Note 5)
t
PHL
Prop Delay: High-to-Low
CP, RS, P2B Outputs
(Note 5)
(Note 7)
t
PLH
Prop Delay: Low-to-High
P1A and P2A Outputs
(Note 6)
t
PLH
Prop Delay: Low-to-High
CP, RS, P2B Outputs
(Note 6)
(Note 7)
t
SKEW
Prop Delay Skew High-to-Low
Between any P1A or P2A
Outputs on a Single Unit
C
L
= 220 pF, R
L
= 10
Important Note:
Not all drivers can be loaded to the highest specified load at the same time without violating the maximum power dissipation limit. The system
design must guarantee that the maximum power dissipation specification is never exceeded.
Min
3.06
Typical
4.6
Max
6.55
Units
ns
CL = 220 pF, R
L
= 10
CL = 82 pF, R
L
= 10
4.1
ns
CL = 220 pF, R
L
= 10
3.38
4.9
6.68
ns
CL = 82 pF, R
L
= 10
4.2
ns
109
387
ps
Prop Delay Skew Low-to-High
157
490
L
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