參數(shù)資料
型號: LM94CIMT
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號調(diào)理
英文描述: TruTherTM Hardware Monitor with PI Loop Fan Control for Server Management
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO56
封裝: MO-153EE, TSSOP-56
文件頁數(shù): 7/24頁
文件大小: 693K
代理商: LM94CIMT
9.0 Pin Descriptions
(Continued)
Symbol
AD_IN11
Pin #
33
Type
Analog Input
(SCSI_Core)
Function
Analog input for +2.5V monitoring, nominal
3
4
scale reading. This
pin may also be used to monitor an analog temperature sensor such
as the LM60, since readings from this input can be routed to the fan
control logic.
Analog input for +1.969V monitoring, nominal
3
4
scale reading.
AD_IN12
34
Analog Input
(Mem_Core)
Analog Input
(Mem_Vtt)
Analog Input
(Gbit_Core)
Analog Input (-12V)
AD_IN13
35
Analog input for +0.984V monitoring, nominal
3
4
scale reading.
AD_IN14
36
Analog input for +0.984V S/B monitoring, nominal
3
4
scale reading.
AD_IN15
37
Analog input for -12V monitoring. External resistors required to scale
to positive level. Full scale reading at 1.236V, , nominal
3
4
scale
reading. This pin may also be used to monitor an analog
temperature sensor such as the LM60, since readings from this
input can be routed to the fan control logic.
This input selects the lower two bits of the LM94 SMBus slave
address.
V
DD
power input for LM94. Generally this is connected to +3.3V
standby power.
The LM94 can be powered by +3.3V if monitoring in low power
states is not required, but power should be applied to this input
before any other pins.
This pin also serves as the analog input to monitor the 3.3V
stand-by (SB) voltage. It is necessary to bypass this pin with a 0.1
μF in parallel with 100 pF. A bulk capacitance of 10 μF should be in
the near vicinity. The 100 pF should be closest to the power pin.
Digital Ground. Digital ground and analog ground need to be tied
together at the chip then both taken to a low noise system ground.
A voltage difference between analog and digital ground may cause
erroneous results.
Fan control output 1.
Address Select
38
3 level analog input
3.3V SB (AD_IN16)
39
POWER (V
DD
) +3.3V
standby power
GND
40
GROUND
PWM1
41
Digital Output
(Open-Drain)
Digital Output
(Open-Drain)
Digital Input
PWM2
42
Fan control output 2
P1_VID0/P1_VID7
43
Voltage Identification signal from the processor. Supports TTL input
logic levels and AGTL compatible input logic levels.
Voltage Identification signal from the processor. Supports TTL input
logic levels and AGTL compatible input logic levels.
Voltage Identification signal from the processor. Supports TTL input
logic levels and AGTL compatible input logic levels.
Voltage Identification signal from the processor. Supports TTL input
logic levels and AGTL compatible input logic levels.
Voltage Identification signal from the processor. Supports TTL input
logic levels and AGTL compatible input logic levels.
Voltage Identification signal from the processor. Supports TTL input
logic levels and AGTL compatible input logic levels.
Connected to CPU1 PROCHOT (processor hot) signal through a
bidirectional level shifter. Supports TTL input logic levels and AGTL
compatible input logic levels.
Connected to CPU2 PROCHOT (processor hot) signal through a
bidirectional level shifter. Supports TTL input logic levels and AGTL
compatible input logic levels.
P1_VID1
44
Digital Input
P1_VID2
45
Digital Input
P1_VID3
46
Digital Input
P1_VID4
47
Digital Input
P1_VID5
48
Digital Input
P1_PROCHOT
49
Digital I/O
(Open-Drain)
P2_PROCHOT
50
Digital I/O
(Open-Drain)
L
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