參數(shù)資料
型號(hào)： LM4560VJD
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 消費(fèi)家電
英文描述： Advanced PCI Audio Accelerator
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： PLASTIC, TQFP-100
文件頁(yè)數(shù)： 29/54頁(yè)
文件大小： 380K
代理商： LM4560VJD
3.0 Register Description
(Continued)
CVOL— Chorus Send Linear Volume (7 bit)
Bit[31:28] (SIN) Sine wave value.
Bit[27] (SIN_S) sign bit of sine wave.
0: positive
1: negative
Bit[26] (SIN_D) SIN counter direction bit.
0: up
1: down
Bit[25:24] (LFO_R) LFO counter clock rate select bits.
00: 48 kHz
01: 48 kHz/4
10: 48 kHz/16
11: 48 kHz/64
Bit[23:16] (LFO_CT) LFO working counter.
Bit[15:14] (FMC) FM modulation control bits.
00: FMA = (FMS * SIN)
>>
3
01: FMA = (FMS * SIN)
>>
2
10: FMA = (FMS * SIN)
>>
1
11: FMA = (FMS * SIN)
>>
0
Bit[13:7] (RVOL) Reverb Send Linear Volume
format: 1.6, 7Fh stands for 2x gain, 40h stands for no gain no
attenuation, 00h stands for mute.
Bit[6:0] (CVOL) Chorus Send Linear Volume
format: 1.6, 7Fh stands for 2x gain, 40h stands for no gain no
attenuation, 00h stands for mute.
3.4.9.28 ECh_B (Bank B ATTRIBUTE & FMC & RVOL &
CVOL) (Bank B Only)
This register can be accessed in index mode or direct ac-
cess mode.
Address:
AudioBase + ECh (index mode) || Audio MEM
Base + 80Ch + 20h*CIR (direct access mode,
CIR: channel index) (CIR
≥
32)
Size:
32 bits
Type:
Read/Write
Default:
XXXXXXXXh
Description:
FMC— Per Channel FM control (2 bit)
RVOL— Reverb Send Linear Volume (7 bit)
CVOL— Chorus Send Linear Volume (7 bit)
Bit[31:19] (ATTRIBUTE) Channel attribute
Bit[31:30] PB/REC Select
00 (Normal PB) Normal playback
This is a normal playback channel in Bank B with Global Vol-
ume, Channel Volume, PAN, SRC, FM/AM features. In this
case, bit[29:19] doesn’t matter.
01 (Special PB) Special playback
This channel can be one of several kinds of special playback
channels. Bit[29:26] is used to select special playback type;
bit[24:25] is used to select data flow from channel to FIFO;
and bit[23:19] is used to enable/disable individual functions.
10 (REC) Recording to system memory
This channel can be one of several kinds of recording chan-
nels. Bit[29:26] is used to select recording type; bit[25:24] is
used to control how MONO sample is generated when re-
cording; bit[23] is used to enable/disable SRC; bit[22:19]
doesn’t matter.
11 (REC_PB) Recording to system memory and playback to
mixer
This channel is a Recording channel which records sample
data to system memory and playback to Main Mixer in the
mean time. In this case, bit[29:26] is used to select recording
type; bit[25:24] is used to control how MONO sample is gen-
erated when recording; and bit[23:19] is used to enable/
disable individual functions.
Bit[29:26] Channel Type Select
when Bit[31:30] is 00: (Normal PB)
xxxx reserved
when Bit[31:30] = 01: (Special PB)
0000 playback to MODEM LINE1 Output FIFO
0001 playback to MODEM LINE2 Output FIFO
0010 playback to PCM L/R Output FIFO
0011 playback to HSET Output FIFO
0100 playback to I2S L/R Output Buffer
0101 playback to CENTER/LFE Output FIFO
0110 playback to SURR L/R Output FIFO
0111 playback to SPDIF L/R Output FIFO
other reserved
when Bit[31:30] = 1x: (REC or REC_PB)
0000 recording from MODEM LINE1 Input FIFO 0001
recording from MODEM LINE2 Input FIFO
0010 recording from PCM L/R Input FIFO
0011 recording from HSET Input FIFO
0100 recording from I2S L/R Input FIFO
0101 recording from MIC Input FIFO
0110 main mixer capture from PCM L/R Output FIFO
0111 main mixer capture from MMC L/R Output Buffer
1000 Reverb Send
1001 Chorus Send
other reserved
BIT[25:24]Special Playback Channel to FIFO data flow se-
lect / Recording to MONO control
When channel is in Special PB mode, this register is used to
select input source of a stereo playback slot pairs such as
PCM L/R, SURR L/R, CENTER/LFE, I2S L/R and SPDIF
L/R. The input source of L/R can be from one channel or can
be from two independent channels.
When channel is in REC or REC_PB mode, this register is
used to control how MONO sample is generated.
when Bit[31:30] = 00 (Normal PB)
xx never used
when Bit[31:30] = 01 (Special PB)
00 Channel L/R to FIFO L/R
In this case, channel is acting as a stereo channel, data flow
is like
Channel Left
→
FIFO Left
Channel Right
→
FIFO Right
01 Channel L to FIFO L
Data flow:
Channel Left
→
FIFO Left
10 Channel R to FIFO R
Data flow:
Channel Right
→
FIFO Right
11 reserved
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