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參數(shù)資料
| 型號： | LM4550VH |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 消費家電 |
| 英文描述： | AC ’97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 X 1.40 MM, LQFP-48 |
| 文件頁數(shù)： | 20/25頁 |
| 文件大?。?/td> | 507K |
| 代理商： | LM4550VH |
Application Information
(Continued)
right channels.
Mute
0
0
1
Default: 0000h
PV3:0
0000
1111
XXXX
Function
0dB attenuation
45dB attenuation
mute
Mixer Input Volume Registers (Index 0Ch - 18h)
These registers set the input volume levels including mute.
Each volume control is 5 bit which provides from a range of
+12dB gain to 34.5dB attenuation in 1.5dB steps. For stereo
ports, the left and right levels can be independently set.
Muting a given port is accomplished by setting the MSB to 1.
Setting the MSB to 1 for stereo ports mutes both the left and
right channel. Register 0Eh has an additional 20dB boost for
a microphone level input. This is enabled by setting bit 6 of
register 0Eh to 1.
Mute
0
0
0
1
Default: 8008h (mono regs.), 8808h (stereo regs.)
Gx4:Gx0
00000
01000
11111
XXXXX
Function
+12dB gain
0dB gain
34.5dB attenuation
mute
Record Select Register (1Ah)
This register independently controls the source for the right
and left channel which will be recorded by the stereo ADC.
The default value is 0000h which corresponds to Mic in.
SL2:SL0
0
1
2
3
4
5
6
7
Left Record Source
Mic
CD In (L)
Video In (L)
Aux In (L)
Line In (L)
Stereo Mix (L)
Mono Mix (L)
Phone
SR2:SR0
0
1
2
3
4
5
6
7
Right Record Source
Mic
CD In (R)
Video In (R)
Aux In (R)
Line In (R)
Stereo Mix (R)
Mono Mix (R)
Phone
Record (Input) Gain Register (1Ch)
This registers controls the Record (Input) Gain level for the
stereo input selected via the Record Select Control Register
(1Ah). The gain can be programmed from 0dB to +22.5dB in
1.5dB steps. The level for the left and right channel can be
individually controlled. The input can also be muted by set-
ting the MSB to 1.
Mute
0
0
1
Default: 8000h
Gx3:Gx0
1111
0000
XXXX
Function
22.5dB gain
0dB gain
mute
General Purpose Register (20h)
This register controls many miscellaneous functions imple-
mented on the LM4550. The miscellaneous functions include
POP which allows the PCM to bypass the National 3D
Sound circuitry, 3D which enables or disables the National
3D Sound circuitry, MIX which selects the MONO_OUT
source, MS which selects the microphone mux source and
LPBK which connects the output of the stereo ADC to input
of the stereo DAC. LPBK provides for a digital loopthru path
when enabled.
BIT
Function
POP
PCM out path and mute, 0 = pre 3D, 1 =
post 3D
National 3D Sound on / off 1 = on
Mono output select 0 = Mix, 1 = Mic
Mic select 0 = Mic1 1 = Mic2
ADC/DAC loopback
3D
MIX
MS
LPBK
Powerdown Control / Status Register (26h)
This read/write register is used to monitor subsystem readi-
ness and also to program the LM4550 powerdown states.
The lower half of this register is read only with a "1", indicat-
ing the subsection is ready. Writing to the lower 8 bits will
have no effect.
When the AC Link "Codec Ready" indicator bit (SDATA_IN
slot 0, bit 15) is a "1", it indicates that the AC Link and AC ’97
registers are in a fully operational state. The AC ’97 Control-
ler must further probe the Powerdown Control / Status Reg-
ister to determine exactly which subsections are ready.
BIT
REF
ANL
DAC
ADC
Function
Vref’s up to nominal level
Analog mixers ready
DAC section ready to accept data
ADC section ready to transmit data
Supported powerdown modes.
BIT
PRO
PR1
PR2
PR3
Function
PCM in ADC’s and Input Mux powerdown
PCM out DAC’s powerdown
Analog Mixer powerdown (VREF still on)
Analog Mixer powerdown (VREF off)
Digital Interface (AC Link) powerdown
(external clk off)
Internal Clk disable
Headphone powerdown
External amplifier powerdown
PR4
PR5
PR6
EAPD
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4550VH WAF | 制造商:Texas Instruments 功能描述: |
| LM4550VH/NOPB | 功能描述:IC AC '97 CODEC 48-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| LM4550VHX | 制造商:Rochester Electronics LLC 功能描述:AC '97 REV 2.1 CODEC - Bulk |
| LM4550VHX/NOPB | 制造商:Texas Instruments 功能描述:Audio Codec 2ADC / 2DAC 18-Bit 48-Pin LQFP T/R |
| LM4558 | 制造商:HTC 制造商全稱:HTC Korea TAEJIN Technology Co. 功能描述:DUAL OPERATIONAL AMPLIFIERS |
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