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參數(shù)資料
| 型號： | LM4550 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | Codec |
| 英文描述： | AC ’97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
| 中文描述： | 交流\u0026#39;97活2.1多聲道音頻編解碼器的立體聲耳機(jī)放大器，采樣率轉(zhuǎn)換和國家3D聲音 |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 507K |
| 代理商： | LM4550 |
AC’97 2.1 Multiple Codec
(Continued)
10097223
Secondary Codec Register Access Definitions
By definition there can be one Primary Codec (ID00) and up to three Secondary Codecs (ID01, 10, and 11). The Codec ID
functions as a chip select. Secondary devices are individually accessible and they do not share registers.
SLOT0:
Bit 15
Valid
Frame
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Slot 1
Valid
Slot 2
Valid
Slot 3
Valid
Slot 4
Valid
Slot 5
Valid
Slot 6
Valid
Slot 7
Valid
Slot 8
Valid
Slot 9
Valid
ID 1
ID 0
For Secondary Codec access, the controller must invalidate the tag bits for Command Address and Data (Slot 0, bits 14 and 13)
and place a non-zero value (01, 10, or 11) into the Code ID field (Slot 0, bits 1 and 0). The value set in the Codec ID field
determines which of the three possible Secondary Codecs is accessed. Secondary Codecs disregard Command Address and
Data (Slot 0, bits 14 and 13) tag bits when they see a 2-bit Codec ID value (Slot 0, bits 1 and 0) that matches their configuration.
For a read operation, bits 1 and 0 are set when bit 14 (Slot 1) contains valid data. For a write operation, bits 1 and 0 are set when
bits 14 and 13 (Slots 1 and 2) contain valid data. The write operation requires the register address and the write data to be valid
within the same frame. Bits 1 and 0 must be cleared when accessing the primary Codec. They must also be cleared during the
idle period where no register read or write is pending. The physical address of a Codec is determined by the ID (0,1) input pins
(pin 45, and 46).
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4550B | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC 97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
| LM4550BVH | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| LM4550BVH/NOPB | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| LM4550BVH/NOPB | 制造商:Texas Instruments 功能描述:Audio Codec IC |
| LM4550BVHX | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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