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參數(shù)資料
| 型號： | LM4550 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | Codec |
| 英文描述： | AC ’97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
| 中文描述： | 交流\u0026#39;97活2.1多聲道音頻編解碼器的立體聲耳機放大器，采樣率轉(zhuǎn)換和國家3D聲音 |
| 文件頁數(shù)： | 19/25頁 |
| 文件大?。?/td> | 507K |
| 代理商： | LM4550 |
Application Information
(Continued)
SDATA_IN Slot 3: PCM Record Left Channel
This slot contains the left ADC sample data. The signal to be
digitized is selected via register 1Ah and subsequently
routed through the Input Mux for recording by the left ADC.
This is a 20-bit slot, where the digitized 18-bit PCM data is
output from the codec MSB first and the last remaining 2 bits
will zeros.
Bits
Description
PCM Record
Left Channel
data
Reserved
Comment
19:2
18 bit audio sample from
left ADC
1:0
Stuffed with "0"’s
SDATA_IN Slot 4: PCM Record Right Channel
This slot contains the right ADC sample data. The signal
digitized is selected via register 1Ah and subsequently
routed through the Input Mux for recording by the right ADC.
This is a 20-bit slot, where the digitized 18-bit PCM data is
output from the codec MSB first and the last remaining 2 bits
will zeros.
Bits
Description
PCM Record
Right Channel
data
Reserved
Comment
19:2
18 bit audio sample from
right ADC
1:0
Stuffed with "0"’s
SDATA_IN Slots 5-12: Reserved
These SDATA_IN slots are set to "0" as they are reserved for
future use.
AC Link Low Power Mode
Register Descriptions
Reset Register (00h)
Writing any value to this register causes a register reset
which changes all of the registers back to their default val-
ues. If a read is performed on this register, the LM4550 will
return a value of 0D50h indicating that National 3D Sound is
implemented, 18bit data is supported for both the ADC’s and
DAC’s, and the volume control for True Line Level Out is
supported.
Master Volume Registers (02h, 06h)
These registers allow the output levels from LINE_OUT and
MONO_OUT to be attenuated or muted. There are 6-bits of
volume control, plus one mute bit. It is a 5-bit volume range,
where each step is nominally 1.5dB and each output can be
individually muted by either setting the most significant bit
(Mx4), and/or the mute bit (D15) to "1."
Mute
0
0
1
Default: 8000h
Mx4:Mx0
0 0000
1 1111
X XXXX
Function
0dB attenuation
46.5dB attenuation
mute
Headphone Volume Registers (04h)
This registers allows the output levels from the HP_OUT to
be attenuated or muted. There are 6-bits of volume control,
plus one mute bit. It is a 5-bit volume range, where each step
is nominally 1.5dB and each output can be individually
muted by either setting the most significant bit (Mx4), and/or
the mute bit (D15) to "1."
PC Beep Register (0Ah)
This register controls the level of the PC_BEEP input. The
PC_BEEP can be both attenuated and muted via register
0Ah. Step size is nominally 3dB. The signal present after the
attenuation and mute block is summed into both the left and
10097209
FIGURE 8. AC Link Powerdown Timing
L
www.national.com
19
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4550B | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:AC 97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
| LM4550BVH | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| LM4550BVH/NOPB | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| LM4550BVH/NOPB | 制造商:Texas Instruments 功能描述:Audio Codec IC |
| LM4550BVHX | 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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