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參數(shù)資料
| 型號(hào)： | LM2720M |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | RES, 10K0 .125W 1% SMT, 0805 |
| 中文描述： | SWITCHING CONTROLLER, 8700 kHz SWITCHING FREQ-MAX, PDSO24 |
| 封裝： | PLASTIC, SOIC-24 |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 149K |
| 代理商： | LM2720M |
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
CC
5V
PWRGD
V
CC
12V
Junction Temperature
Power Dissipation (Note 2)
7V
(V
CC
5V + 0.2V)
20V
125C
1.6W
Storage Temperature
ESD Susceptibility (Note 8)
Soldering Time, Temperature
65C to +150C
2 kV
10 sec., 300C
Operating Ratings
(Note 1)
V
CC
5V
V
CC
12V
Junction Temperature Range
4.5V to 5.5V
10V to 18V
0C to 70C
Electrical Characteristics
V
5V = 5V, V
12V = 12V unless otherwise specified. Typicals and limits appearing in plain type apply for T
A
= T
J
= +25C.
Limits appearing in
boldface
type apply over the entire operating temperature range.
Symbol
Parameter
Conditions
V
DACOUT
5-bit DAC Output Voltage
(Note 3)
I
CC
12V
Quiescent V
CC
12V Current
Enable = 5V, VID = 00001,
DRV Outputs Floating
I
CC
5V
Operating V
CC
5V Current
V
OUT
= 2.00V
V
REF
Rref Pin Voltage
V
INL
Vid0:4, Clksel, Divsel, and
Enable Pins Logic Threshold
V
INH
Logic High (Note 5)
Vid0:4 and Enable Pins Internal
Pullup Current
The Corresponding Pin = 0V
Clksel, Divsel Pins Internal
Pullup Current
Gate Driver Resistance When
Sinking Current
V
DRV
DRV0:3 Output Voltage
I
DRV
= 10 mA, V
CC
12V = 14V
Min
Typ
N
1
Max
N+1.5%
2
Units
V
mA
N1.5%
4.3
1.225
1.8
2.8
100
8
mA
V
V
V
Logic Low (Note 4)
1.5
3.5
60
I
INL
140
μA
10
0
10
I
SINK
= 50 μA, V
CC
12V = 14V
12
V
CC
12V
1.5V
V
CC
12V
1.0V
7
60
160
4
0
2.4
30
8.0
V
t
fall
I
SRC
I
SINK
VB
gOUT
DRV0:3 Fall Time
DRV0:3 Source Current
DRV0:3 Sink Current
B
gOUT
Voltage
(Note 6)
DRV0:3 = 0V, V
CC
12V = 14V
DRV0:3 = 5V, V
CC
12V = 14V
Current Limit Not Activated
Current Limit Activated
B
gOUT
= 1V
FB = 2V
8.02k
from Rref Pin to
Ground
Duty Cycle = 50%
Duty Cycle = 50%, F
clock
= 8
MHz
Divide by 4
Divide by 3
1.3V
≤
V
OUT
≤
1.9V
ns
mA
mA
40
90
250
V
IB
gOUT
I
FB
F
OSC
B
gOUT
Sink Current
FB Pin Bias Current
Oscillator Frequency
1.0
5
mA
nA
MHz
7.0
8.7
D
ph
DRV0:3 Duty Cycle Match
DRV0:3 Phase Accuracy
1
1
+1
+1
%
Deg
T
off
PWM Off time
22
22
%
V
PWRGD
Power Good Detection
Window,
V
OUT
Hysteresis
Power Good Detection
Window,
V
OUT
Hysteresis
±
100
mV
50
2V
≤
V
OUT
≤
3.5V
±
150
50
L
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